WM8994ECSSLASHR datasheet(2/363 Pages) CIRRUS

2 / 363 page

WM8994

Rev 4.6

TABLE OF CONTENTS

DESCRIPTION................................................................................................................ 1

FEATURES ..................................................................................................................... 1

APPLICATIONS.............................................................................................................. 1

TABLE OF CONTENTS.................................................................................................. 2

BLOCK DIAGRAM ......................................................................................................... 6

PIN CONFIGURATION ................................................................................................... 7

ORDERING INFORMATION........................................................................................... 7

PIN DESCRIPTION......................................................................................................... 8

ABSOLUTE MAXIMUM RATINGS ............................................................................... 11

RECOMMENDED OPERATING CONDITIONS............................................................ 12

THERMAL PERFORMANCE........................................................................................ 13

ELECTRICAL CHARACTERISTICS ............................................................................ 14

INPUT SIGNAL LEVEL ............................................................................................................14

INPUT PIN RESISTANCE........................................................................................................15

PROGRAMMABLE GAINS.......................................................................................................17

OUTPUT DRIVER CHARACTERISTICS .................................................................................18

ADC INPUT PATH PERFORMANCE.......................................................................................19

DAC OUTPUT PATH PERFORMANCE...................................................................................20

BYPASS PATH PERFORMANCE............................................................................................23

MULTI-PATH CROSSTALK .....................................................................................................25

DIGITAL INPUT / OUTPUT ......................................................................................................27

DIGITAL FILTER CHARACTERISTICS ...................................................................................27

MICROPHONE BIAS CHARACTERISTICS.............................................................................28

MISCELLANEOUS CHARACTERISTICS ................................................................................29

TERMINOLOGY .......................................................................................................................30

TYPICAL PERFORMANCE .......................................................................................... 31

TYPICAL POWER CONSUMPTION ........................................................................................31

TYPICAL SIGNAL LATENCY...................................................................................................32

SPEAKER DRIVER PERFORMANCE .....................................................................................33

SIGNAL TIMING REQUIREMENTS ............................................................................. 34

SYSTEM CLOCKS & FREQUENCY LOCKED LOOP (FLL)....................................................34

AUDIO INTERFACE TIMING ...................................................................................................35

DIGITAL MICROPHONE (DMIC) INTERFACE TIMING................................................................................................................35

DIGITAL AUDIO INTERFACE - MASTER MODE .........................................................................................................................36

DIGITAL AUDIO INTERFACE - SLAVE MODE.............................................................................................................................37

DIGITAL AUDIO INTERFACE - TDM MODE ................................................................................................................................38

CONTROL INTERFACE TIMING .............................................................................................39

2-WIRE (I2C) CONTROL MODE ...................................................................................................................................................39

3-WIRE (SPI) CONTROL MODE...................................................................................................................................................40

4-WIRE (SPI) CONTROL MODE...................................................................................................................................................41

DEVICE DESCRIPTION ............................................................................................... 42

INTRODUCTION ......................................................................................................................42

ANALOGUE INPUT SIGNAL PATH .........................................................................................44

MICROPHONE INPUTS ................................................................................................................................................................45

MICROPHONE BIAS CONTROL ..................................................................................................................................................45

MICROPHONE CURRENT DETECT ............................................................................................................................................46

LINE AND VOICE CODEC INPUTS ..............................................................................................................................................47

INPUT PGA ENABLE ....................................................................................................................................................................48

INPUT PGA CONFIGURATION ....................................................................................................................................................48

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