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WM8994ECS/R Datenblatt(PDF) 49 Page - Cirrus Logic |
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WM8994ECS/R Datenblatt(HTML) 49 Page - Cirrus Logic |
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49 / 363 page ![]() WM8994 Rev 4.6 49 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R40 (0028h) Input Mixer (2) 7 IN2LP_TO_IN2L 0 IN2L PGA Non-Inverting Input Select 0 = Connected to VMID 1 = Connected to IN2LP Note that VMID_BUF_ENA must be set when using IN2L connected to VMID. 6 IN2LN_TO_IN2L 0 IN2L PGA Inverting Input Select 0 = Not connected 1 = Connected to IN2LN 5 IN1LP_TO_IN1L 0 IN1L PGA Non-Inverting Input Select 0 = Connected to VMID 1 = Connected to IN1LP Note that VMID_BUF_ENA must be set when using IN1L connected to VMID. 4 IN1LN_TO_IN1L 0 IN1L PGA Inverting Input Select 0 = Not connected 1 = Connected to IN1LN 3 IN2RP_TO_IN2R 0 IN2R PGA Non-Inverting Input Select 0 = Connected to VMID 1 = Connected to IN2RP Note that VMID_BUF_ENA must be set when using IN2R connected to VMID. 2 IN2RN_TO_IN2R 0 IN2R PGA Inverting Input Select 0 = Not connected 1 = Connected to IN2RN 1 IN1RP_TO_IN1R 0 IN1R PGA Non-Inverting Input Select 0 = Connected to VMID 1 = Connected to IN1RP Note that VMID_BUF_ENA must be set when using IN1R connected to VMID. 0 IN1RN_TO_IN1R 0 IN1R PGA Inverting Input Select 0 = Not connected 1 = Connected to IN1RN Table 3 Input PGA Configuration |
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