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WM8994ECS/R Datenblatt(PDF) 76 Page - Cirrus Logic |
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WM8994ECS/R Datenblatt(HTML) 76 Page - Cirrus Logic |
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76 / 363 page ![]() WM8994 76 Rev 4.6 QUICK RELEASE CONTROL The DRC includes a Quick-Release feature to handle short transient peaks that are not related to the intended source signal. For example, in handheld microphone recording, transient signal peaks sometimes occur due to user handling, key presses or accidental tapping against the microphone. The Quick Release feature ensures that these transients do not cause the intended signal to be masked by the longer time constants of [DRC]_DCY. The Quick-Release feature is enabled by setting the [DRC]_QR bit. When this bit is enabled, the DRC measures the crest factor (peak to RMS ratio) of the input signal. A high crest factor is indicative of a transient peak that may not be related to the intended source signal. If the crest factor exceeds the level set by [DRC]_QR_THR, then the normal decay rate ([DRC]_DCY) is ignored and a faster decay rate ([DRC]_QR_DCY) is used instead. Note that the Quick Release feature should not be enabled at the same time as the Anti-Clip feature (described above) on the same DRC. SIGNAL ACTIVITY DETECT The DRC incorporates a configurable signal detect function, allowing the signal level at the DRC input to be monitored and to be used to trigger other events. This can be used to detect the presence of a microphone signal on an ADC or digital mic channel, or can be used to detect an audio signal received over the digital audio interface. The Peak signal level or the RMS signal level of the DRC input can be selected as the detection threshold. When the threshold condition is exceeded, an interrupt or GPIO output can be generated. See “General Purpose Input/Output” for a full description of the applicable control fields. DRC REGISTER CONTROLS The AIF1DRC1 control registers are described in Table 24. The AIF1DRC2 control registers are described in Table 25. The AIF2DRC control registers are described in Table 26. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R1088 (0440h) AIF1 DRC1 (1) 8 AIF1DRC1_NG_ ENA 0 AIF1 DRC1 Noise Gate Enable 0 = Disabled 1 = Enabled 5 AIF1DRC1_KNE E2_OP_ENA 0 AIF1 DRC1 KNEE2_OP Enable 0 = Disabled 1 = Enabled 4 AIF1DRC1_QR 1 AIF1 DRC1 Quick-release Enable 0 = Disabled 1 = Enabled 3 AIF1DRC1_ANTI CLIP 1 AIF1 DRC1 Anti-clip Enable 0 = Disabled 1 = Enabled |
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