ST7285C datasheet(72/117 Pages) STMICROELECTRONICS

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ST7285C

4.9 RDS G.B.S

4.9.1 Introduction

The main task of the GBS module is to acquire

Group and Block Synchronization of a received

RDS data steam, which is provided in a modified

shortened cyclic code.

In order to achieve synchronization, a syndrome is

calculated on every data clock pulse. Detection of

a valid syndrome is indicated by flag VSI with as-

sociated interrupt, while the corresponding block is

kept in BL(0:2). Starting in BIT_SYNC mode the

SW can use CNA zero count interrupt (CNA=1)

and VSI check for synchronization phase. If the

synchronization criteria is fulfilled, the SW can

switch to BLK_SYNC mode, setting counter CNA

to 26 and CNB to the current block code. The SW

maintains block synchronization easily by check-

ing VSI and ORD, which indicates a correct block

order.

An optional GRP_SYNC mode can be entered for

RDS standby operation using the appropriate

counter interrupt selection.

The combination of software triggered syndrome

calculation, a second 26-bit shift register and a 26-

bit quality register, allow highly flexible error cor-

rection by software.

Single quality errors, representing a 1 or 2 bit

RDSDAT error, are indicated by the SQE flag.

They can be corrected by SW with high security.

4.9.2 Features

– Hardware implemented decoding of RDS data

stream.

– Hardware triggered syndrome calculation with

every rising edge of RDSCLK.

– Storage of 26 RDS bits (1 block).

– Fast syndrome calculation

(within 2.4

µsat f

OSC=8.664MHz).

– 5-bits RDS-counter CNA and 2-bit RDS-block

counter CNB.

– Selectable counter interrupt for BIT/BLOCK/

GROUP-SYNC mode.

– “Valid Syndrome” detection unit with interrupt

and block code output.

– Selectable MMBS Radio Paging option for block

E syndrome detection.

– “Valid Block Order” flag.

– Extended “error correction by software” support.

– Software triggered syndrome calculation.

– Parallel storage of 26 RDSDAT bits and 26

QUALITY bits for high flexibility.

– Single/Multiple quality-error flags.

Figure 34. Principles of Baseband Coding

BLOCK1

BLOCK2

BLOCK3

BLOCK4

GROUP = 4 BLOCKS = 104 BITS

m15 m14 m13 m12 m11 m10 m9 m8 m7 m6 m5 m4 m3 m2 m1 m0

’

BLOCK = 26BITS

INFORMATION WORD = 16-BITS

CHECK WORD = 10-BITS

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