ST7285C datasheet(26/117 Pages) STMICROELECTRONICS

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ST7285C

I/O PORTS (Cont’d)

4.1.2.3 Operating Modes

All I/O pins may be configured as inputs or outputs

by programming the corresponding bits of the DR,

DDR, OR and PUR memory-mapped registers.

Table 6 illustrates the available operating modes.

During Reset, DR, DDR, OR and PUR are initial-

ized to a Low level.

Table 6. I/O Operating Modes

Note: (1) This state can add static current consumption.

– Input Mode

In input mode, both the analog multiplexer and the

port buffer are switched to a high impedance state.

To avoid ringing with slowly rising or falling input

signals and to increase noise immunity, the inputs

are equipped with Schmitt-triggers.

The state of the pin is readable through the Data

Schmitt Trigger’s output and not from the Data

There are four different input modes, as illustrated

in Table 6.

Note: Pull-up and pull-down devices are not imple-

mented by means of linear resistors, but by means

of resistive transistors.

– Interrupt function

The interrupt signals of all activated bits are

NANDed together, so that whenever at least one

of the activated inputs goes low, the port’s com-

mon interrupt output will go high in order to acti-

vate the CPU interrupt input.

– Output Mode

In output mode, the port output buffer is activated

and drives the output according to the content of

the data register, DR. In this mode, the analog

multiplexer, when present, is switched to high im-

pedance and the interrupt is disabled.

Data written to the DR is directly copied to the out-

put pins. A read operation of DR will be directly

performed from the DR register, so that the output

data stored in DR is readable, regardless of the

logic levels at the output pin due to output loading.

There are three different output modes for the

standard I/O pins as illustrated inTable 6.

– Alternate function

Alternate functions take priority over standard I/O

programming; if a peripheral needs to use a pad,

the alternate function is automatically activated.

The signal from the peripheral is output to the pad

(automatically configured in this case in push-pull

or open drain modes without pull-up and pull-

down), and controlled directly by the peripheral.

The signal to be input to the peripheral from the

pad is taken after the schmitt trigger and is control-

led directly by the peripheral. In this case, the pin’s

state is readable as in Input Mode by addressing

the Data Register and by configuring the PAD in

Input Mode (DDR=0).

– Analog Input Mode

In analog input mode (activated by the ADC), the

analog multiplexer is activated and switches the

analog voltage present on the selected pin (pins

PA0 to PA7) to the common analog rail. The com-

mon analog rail is connected to the Analog to Dig-

ital converter (see Section 4.6) input. It is not rec-

ommended to change the voltage level or loading

on any port pin while conversion is in progress.

Furthermore it is not recommended to have clock-

ing pins located close to a selected analog pad.

WARNING: Before activating the Analog Input

Mode, the I/O state must be set to:

INPUT, NO PULL-UP, NO INTERRUPT

(DDR = 0, OR = 0, PUR = 1)

The alternate function must not be activated as

long as the pad is configured as Input with Inter-

rupt, in order to avoid generating spurious inter-

rupts.

Analog input mode is only implemented for pins

PA0 to PA7. The analog input voltage level must

be within the limits stated in the Absolute Maxi-

mum Ratings.

DDR

PUR

Mode

Option

input

pull-up, no interrupt

input

no pull-up, no interrupt

input

pull-up, interrupt

input

pull-down, no interrupt

output

open-drain, pull-up

output

open-drain, no pull-up

output

RESERVED (1)

output

push-pull, no pull-up, no

pull-down

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