WM8994ECSSLASHR datasheet(118/363 Pages) CIRRUS

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WM8994

118

Rev 4.6

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R47 (002Fh)

Output Mixer

(3)

5:3

IN1R_MIXOUTL_VOL

[2:0]

000

IN1R PGA Output to MIXOUTL

Volume

0dB to -21dB in 3dB steps

000 = 0dB

001 = -3dB

…(3dB steps)

111 = -21dB

(See Table 59 for Volume Range)

R45 (002Dh)

Output Mixer

(1)

IN2LP_TO_MIXOUTL

IN2LP to MIXOUTL Mute

0 = Mute

1 = Un-mute

Note that VMID_BUF_ENA must be

set when using the IN2LP input to

MIXOUTL.

R47 (002Fh)

Output Mixer

(3)

11:9

IN2LP_MIXOUTL_VOL

[2:0]

000

IN2LP to MIXOUTL Volume

0dB to -21dB in 3dB steps

000 = 0dB

001 = -3dB

…(3dB steps)

111 = -21dB

(See Table 59 for Volume Range)

R45 (002Dh)

Output Mixer

(1)

MIXINR_TO_MIXOUTL

MIXINR Output (Right ADC bypass)

to MIXOUTL Mute

0 = Mute

1 = Un-mute

R49 (0031h)

Output Mixer

(5)

5:3

MIXINR_MIXOUTL_VO

L [2:0]

000

MIXINR Output (Right ADC bypass)

to MIXOUTL Volume

0dB to -21dB in 3dB steps

000 = 0dB

001 = -3dB

…(3dB steps)

111 = -21dB

(See Table 59 for Volume Range)

R45 (002Dh)

Output Mixer

(1)

MIXINL_TO_MIXOUTL

MIXINL Output (Left ADC bypass)

to MIXOUTL Mute

0 = Mute

1 = Un-mute

R49 (0031h)

Output Mixer

(5)

2:0

MIXINL_MIXOUTL_VOL

[2:0]

000

MIXINL Output (Left ADC bypass)

to MIXOUTL Volume

0dB to -21dB in 3dB steps

000 = 0dB

001 = -3dB

…(3dB steps)

111 = -21dB

(See Table 59 for Volume Range)

R45 (002Dh)

Output Mixer

(1)

DAC1L_TO_MIXOUTL

Left DAC1 to MIXOUTL Mute

0 = Mute

1 = Un-mute

R49 (0031h)

Output Mixer

(5)

11:9

DAC1L_MIXOUTL_VOL

[2:0]

000

Left DAC1 to MIXOUTL Volume

0dB to -21dB in 3dB steps

000 = 0dB

001 = -3dB

…(3dB steps)

111 = -21dB

(See Table 59 for Volume Range)

Table 57 Left Output Mixer (MIXOUTL) Control

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