WM8994ECSSLASHR datasheet(152/363 Pages) CIRRUS

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WM8994

152

Rev 4.6

GPn_FN

DESCRIPTION

COMMENTS

0Dh

AIF1 DRC1 Signal

Detect

Indicates AIF1 DRC1 Signal Detect status

0 = Signal threshold not exceeded

1 = Signal threshold exceeded

0Eh

AIF1 DRC2 Signal

Detect

Indicates AIF1 DRC2 Signal Detect status

0 = Signal threshold not exceeded

1 = Signal threshold exceeded

0Fh

AIF2 DRC Signal

Detect

Indicates AIF2 DRC Signal Detect status

0 = Signal threshold not exceeded

1 = Signal threshold exceeded

10h

Write Sequencer

Status

Indicates Write Sequencer status

0 = Write Sequencer Idle

1 = Write Sequence Busy

11h

FIFO Error

Indicates a Digital Core FIFO Error condition

0 = Normal operation

1 = FIFO Error

12h

Clock Output OPCLK

GPIO Clock derived from SYSCLK

13h

Temperature (Warning)

status output

Indicates Temperature Warning Sensor status

0 = Temperature is below warning level

1 = Temperature is above warning level

14h

DC Servo Done

Indicates DC Servo status on HPOUT1L and HPOUT1R

0 = DC Servo not complete

1 = DC Servo complete

15h

FLL1 Clock Output

Clock output from FLL1

16h

FLL2 Clock Output

Clock output from FLL2

17h to 1Fh

Reserved

Table 81 GPIO Function Select

BUTTON DETECT (GPIO INPUT)

Button detect functionality can be selected on any GPIO pin by setting the respective GPIO registers

as described in “GPIO Control”. The same functionality can be used to support a Jack Detect input

function.

It is recommended to enable the GPIO input de-bounce feature when using GPIOs as button input or

Jack Detect input.

The GPn_LVL fields may be read to determine the logic levels on a GPIO input, after the selectable

de-bounce controls. Note that GPn_LVL is not affected by the GPn_POL bit.

The de-bounced GPIO signals are also inputs to the Interrupt control circuit. An interrupt event is

triggered on the rising and falling edge of the GPIO input. The associated interrupt bits are latched

once set; it can be polled at any time or used to control the IRQ signal. See “Interrupts” for more

details of the Interrupt event handling.

LOGIC ‘1’ AND LOGIC ‘0’ OUTPUT (GPIO OUTPUT)

The WM8994 can be programmed to drive a logic high or logic low level on any GPIO pin by selecting

the “GPIO Output” function as described in “GPIO Control”. The output logic level is selected using the

respective GPn_LVL bit.

Note that the polarity of the GPIO output can be inverted using the GPn_POL registers. If GPn_POL =

1, then the external output will be the opposite logic level to GPn_LVL.

WM8994ECS/R Datenblatt(PDF) 152 Page - Cirrus Logic

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