WM8994ECSSLASHR datasheet(113/363 Pages) CIRRUS

113 / 363 page

WM8994

Rev 4.6

113

OUTPUT SIGNAL PATHS ENABLE

The output mixers and drivers can be independently enabled and disabled as described in Table 53.

The supply rails for headphone outputs HPOUT1L and HPOUT1R are generated using an integrated

dual-mode Charge Pump, which must be enabled whenever the headphone outputs are used. See the

“Charge Pump” section for details on enabling and configuring this circuit.

Note that the headphone outputs HPOUT1L and HPOUT1R have dedicated output PGAs and volume

controls. As a result, a low power consumption DAC playback path can be supported without needing

to enable the output mixers MIXOUTL / MIXOUTR or the mixer output PGAs MIXOUTLVOL /

MIXOUTRVOL.

Note that the Headphone Outputs are also controlled by fields located within Register R96, which

provide suppression of pops & clicks when enabling and disabling the HPOUT1L and HPOUT1R

signal paths. These registers are described in the following “Headphone Signal Paths Enable” section.

Under recommended usage conditions, the Headphone Pop Suppression control bits will be

configured by scheduling the default Start-

Up and Shutdown sequences as described in the “Control

Write Sequencer

” section. In these cases, the user does not need to set the register fields in R1 and

R96 directly.

For normal operation of the output signal paths, the reference voltage VMID and the bias current must

also be enabled. See “Reference Voltages and Master Bias” for details of the associated controls

VMID_SEL and BIAS_ENA.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R1 (0001h)

Power

Management

(1)

SPKOUTR_ENA

SPKMIXR Mixer, SPKRVOL PGA

and SPKOUTR Output Enable

0 = Disabled

1 = Enabled

SPKOUTL_ENA

SPKMIXL Mixer, SPKLVOL PGA

and SPKOUTL Output Enable

0 = Disabled

1 = Enabled

HPOUT2_ENA

HPOUT2 Output Stage Enable

0 = Disabled

1 = Enabled

HPOUT1L_ENA

Enables HPOUT1L input stage

0 = Disabled

1 = Enabled

For normal operation, this bit should

be set as the first step of the

HPOUT1L Enable sequence.

HPOUT1R_ENA

Enables HPOUT1R input stage

0 = Disabled

1 = Enabled

For normal operation, this bit should

be set as the first step of the

HPOUT1R Enable sequence.

WM8994ECS/R Datenblatt(PDF) 113 Page - Cirrus Logic

WM8994ECS/R Datenblatt(HTML) 113 Page - Cirrus Logic

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datenblatt Download

Link URL