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MSP432P411VIPZ Datenblatt(PDF) 22 Page - Texas Instruments

Teilenummer MSP432P411VIPZ
Bauteilbeschribung  SimpleLink Mixed-Signal Microcontrollers
PDF  212 Pages
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Hersteller  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

MSP432P411VIPZ Datenblatt(HTML) 22 Page - Texas Instruments

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MSP432P4111, MSP432P4011, MSP432P411Y
MSP432P401Y, MSP432P411V, MSP432P401V
SLASEA0A – DECEMBER 2017 – REVISED FEBRUARY 2018
www.ti.com
Submit Documentation Feedback
Product Folder Links: MSP432P4111 MSP432P4011 MSP432P411Y MSP432P401Y MSP432P411V MSP432P401V
Terminal Configuration and Functions
Copyright © 2017–2018, Texas Instruments Incorporated
Table 4-3. Signal Descriptions (continued)
FUNCTION
SIGNAL NAME
SIGNAL NO. (1)
SIGNAL
TYPE (2)
DESCRIPTION
PZ
RGC
LCD (3)
(continued)
L20
23
N/A
O
LCD drive pin 20 for either segment or common output
L21
22
N/A
O
LCD drive pin 21 for either segment or common output
L22
21
N/A
O
LCD drive pin 22 for either segment or common output
L23
20
N/A
O
LCD drive pin 23 for either segment or common output
L24
79
N/A
O
LCD drive pin 24 for either segment or common output
L25
78
N/A
O
LCD drive pin 25 for either segment or common output
L26
77
N/A
O
LCD drive pin 26 for either segment or common output
L27
76
N/A
O
LCD drive pin 27 for either segment or common output
L28
29
N/A
O
LCD drive pin 28 for either segment or common output
L29
28
N/A
O
LCD drive pin 29 for either segment or common output
L30
27
N/A
O
LCD drive pin 30 for either segment or common output
L31
26
N/A
O
LCD drive pin 31 for either segment or common output
L32
75
N/A
O
LCD drive pin 32 for either segment or common output
L33
74
N/A
O
LCD drive pin 33 for either segment or common output
L34
25
N/A
O
LCD drive pin 34 for either segment or common output
L35
24
N/A
O
LCD drive pin 35 for either segment or common output
L36
3
N/A
O
LCD drive pin 36 for either segment or common output
L37
2
N/A
O
LCD drive pin 37 for either segment or common output
L38
1
N/A
O
LCD drive pin 38 for either segment or common output
L39
100
N/A
O
LCD drive pin 39 for either segment or common output
L40
99
N/A
O
LCD drive pin 40 for either segment or common output
L41
98
N/A
O
LCD drive pin 41 for either segment or common output
L42
97
N/A
O
LCD drive pin 42 for either segment or common output
L43
96
N/A
O
LCD drive pin 43 for either segment or common output
L44
49
N/A
O
LCD drive pin 44 for either segment or common output
L45
48
N/A
O
LCD drive pin 45 for either segment or common output
L46
47
N/A
O
LCD drive pin 46 for either segment or common output
L47
46
N/A
O
LCD drive pin 47 for either segment or common output
R03
88
N/A
I
Input port of fourth most positive analog LCD voltage V4 in
external bias mode
R13
89
N/A
I
Input port of fourth most positive analog LCD voltage V3 in
external bias mode
R23
90
N/A
I
Input port of fourth most positive analog LCD voltage V2 in
external bias mode
Debug
SWCLKTCK
95
64
I
Serial wire clock input (SWCLK)/JTAG clock input (TCK)
SWDIOTMS
94
63
I/O
Serial wire data input/output (SWDIO)/JTAG test mode
select (TMS)
SWO
93
62
O
Serial wire trace output
TDI
92
61
I
JTAG test data input
TDO
93
62
O
JTAG test data output



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