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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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MSP432P411VIPZ Datenblatt(PDF) 4 Page - Texas Instruments |
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MSP432P411VIPZ Datenblatt(HTML) 4 Page - Texas Instruments |
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4 / 212 page  PCM Power Control Manager PSS Power Supply System CS Clock System RTC_C Real-Time Clock WDT_A Watchdog Timer I/O Ports P1 to P10 78 I/Os I/O Ports PJ 6 I/Os Flash 2048KB 1024KB 512KB SRAM (includes Backup Memory) 256KB 128KB ROM (Driver Library) 32KB RSTCTL Reset Controller SYSCTL_A System Controller AES256 Security Encryption, Decryption CRC32 Precision ADC 1 Msps, SAR A/D Comp_E0 Comp_E1 Analog Comparator REF_A Voltage Reference TA0, TA1 TA2,TA3 Timer_A 16 Bit 5 CCR Timer32 Two 32-bit Timers eUSCI_A0 eUSCI_A1 eUSCI_A2 eUSCI_A3 (UART, IrDA, SPI) eUSCI_B0 eUSCI_B1 eUSCI_B2 eUSCI_B3 (I C, SPI) 2 Bus Control Logic DMA 8 Channels Capacitive Touch I/O 0, Capacitive Touch I/O 1 Address Data LFXIN, HFXIN LFXOUT, HFXOUT DCOR LPM3.5 Domain P1.x to P10.x PJ.x Backup Memory SRAM 8KB CPU MPU NVIC, SysTick FPB, DWT Arm Cortex-M4F ITM, TPIU JTAG, SWD Utility SRAM 2KB Copyright © 2017, Texas Instruments Incorporated 4 MSP432P4111, MSP432P4011, MSP432P411Y MSP432P401Y, MSP432P411V, MSP432P401V SLASEA0A – DECEMBER 2017 – REVISED FEBRUARY 2018 www.ti.com Submit Documentation Feedback Product Folder Links: MSP432P4111 MSP432P4011 MSP432P411Y MSP432P401Y MSP432P411V MSP432P401V Device Overview Copyright © 2017–2018, Texas Instruments Incorporated Figure 1-2. MSP432P401x Functional Block Diagram The CPU and all of the peripherals in the device interact with each other through a common AHB matrix. In some cases, there are bridges between the AHB ports and the peripherals. These bridges are transparent to the application from a memory map perspective and, therefore, are not shown in the block diagram. |
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