MSP432P411VIPZ datasheet(100/212 Pages) TI1

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SRAM Region

0x2000_0000

0x2010_0000

Reserved

0x2400_0000

SRAM

Bit-Band Alias

Region

Reserved

0x3FFF_FFFF

0x2200_0000

100

MSP432P4111, MSP432P4011, MSP432P411Y

MSP432P401Y, MSP432P411V, MSP432P401V

SLASEA0A – DECEMBER 2017 – REVISED FEBRUARY 2018

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Detailed Description

Figure 6-3. SRAM Zone Memory Map

6.3.2.1

SRAM Region

The 1-MB region from 0x2000_0000 to 0x200F_FFFF is defined as the SRAM region. The SRAM

accessible in this region is also aliased in the Code zone of the device, thereby allowing efficient access to

the SRAM, both for instruction fetches and data reads. See Section 6.4.2 for details about the SRAM.

6.3.2.2

SRAM Bit-Band Alias Region

The 32-MB region from 0x2200_0000 to 0x23FF_FFFF forms the bit-band alias region for the 1-MB

SRAM region. Bit-banding is a feature of the Cortex-M4 processor and allows the application to set or

clear individual bits throughout the SRAM space without using the pipeline bandwidth of the processor to

carry out an exclusive read-modify-write sequence.

6.3.3

Peripheral Zone Memory Map

The Peripheral zone of the device is in the address range of 0x4000_0000 to 0x5FFF_FFFF. This is

further divided as shown in Figure 6-4.

MSP432P411VIPZ Datenblatt(PDF) 100 Page - Texas Instruments