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MSP432P411VIPZ Datenblatt(PDF) 8 Page - Texas Instruments

Teilenummer MSP432P411VIPZ
Bauteilbeschribung  SimpleLink Mixed-Signal Microcontrollers
PDF  212 Pages
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Hersteller  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

MSP432P411VIPZ Datenblatt(HTML) 8 Page - Texas Instruments

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1
P1.0/UCA0STE
2
P1.1/UCA0CLK
3
P1.2/UCA0RXD/UCA0SOMI
4
P1.3/UCA0TXD/UCA0SIMO
5
P1.4/UCB0STE
6
P1.5/UCB0CLK
7
P1.6/UCB0SIMO/UCB0SDA
8
P1.7/UCB0SOMI/UCB0SCL
9
DVSS1
10
VSW
11
DVCC1
12
VCORE
13
P2.0/PM_UCA1STE
14
P2.1/PM_UCA1CLK
15
P2.2/PM_UCA1RXD/PM_UCA1SOMI
16
P2.3/PM_UCA1TXD/PM_UCA1SIMO
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
33
P4.2/ACLK/TA2CLK/A11
34
P4.3/MCLK/RTCCLK/A10
35
P4.4/HSMCLK/SVMHOUT/A9
36
P4.5/A8
37
P4.6/A7
38
P4.7/A6
39
P5.0/A5
40
P5.1/A4
41
P5.2/A3
42
P5.3/A2
43
P5.4/A1
44
P5.5/A0
45
P5.6/TA2.1/VREF+/VeREF+/C1.7
46
P5.7/TA2.2/VREF-/VeREF-/C1.6
47
DVSS2
48
DVCC2
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
8
MSP432P4111, MSP432P4011, MSP432P411Y
MSP432P401Y, MSP432P411V, MSP432P401V
SLASEA0A – DECEMBER 2017 – REVISED FEBRUARY 2018
www.ti.com
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Product Folder Links: MSP432P4111 MSP432P4011 MSP432P411Y MSP432P401Y MSP432P411V MSP432P401V
Terminal Configuration and Functions
Copyright © 2017–2018, Texas Instruments Incorporated
4.2
Pin Diagram for MSP432P401xI Devices
Figure 4-2 shows the pinout of the 64-pin RGC package.
A.
The secondary digital functions on Ports P2, P3, and P7 are fully mappable. This pinout shows only the default
mapping. See Section 6.9.2 for details.
B.
A glitch filter is implemented on these digital I/Os: P1.0, P1.4, P1.5, P3.0, P3.4, P3.5, P6.6, P6.7.
C.
TI recommends connecting the thermal pad on the QFN package to DVSS.
D.
UART BSL pins: P1.2 - BSLRXD, P1.3 - BSLTXD
E.
SPI BSL pins: P1.4 - BSLSTE, P1.5 - BSLCLK, P1.6 - BSLSIMO, P1.7 - BSLSOMI
F.
I2C BSL pins: P3.6 - BSLSDA, P3.7 - BSLSCL
Figure 4-2. 64-Pin RGC Package (Top View)



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