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MSP432P411VIPZ Datenblatt(PDF) 95 Page - Texas Instruments

Teilenummer MSP432P411VIPZ
Bauteilbeschribung  SimpleLink Mixed-Signal Microcontrollers
PDF  212 Pages
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Hersteller  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
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MSP432P411VIPZ Datenblatt(HTML) 95 Page - Texas Instruments

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MSP432P4111, MSP432P4011, MSP432P411Y
MSP432P401Y, MSP432P411V, MSP432P401V
www.ti.com
SLASEA0A – DECEMBER 2017 – REVISED FEBRUARY 2018
Submit Documentation Feedback
Product Folder Links: MSP432P4111 MSP432P4011 MSP432P411Y MSP432P401Y MSP432P411V MSP432P401V
Specifications
Copyright © 2017–2018, Texas Instruments Incorporated
Table 5-50 lists the characteristics of the flash stand-alone operations.
Table 5-50. Flash Stand-Alone Operations
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
tPGM, Immediate
Program time for one 32-bit data using
immediate write mode
VER_PRE = 0, VER_PST = 1
52
µs
VER_PRE = 1, VER_PST = 1
63
tPGM, Full-word
Program time for one 128-bit word using full
word write mode
VER_PRE = 0, VER_PST = 1
49
µs
VER_PRE = 1, VER_PST = 1
70
tPGM, Burst
Program time for 4×128-bit burst using burst
write mode
AUTO_PRE = 0, AUTO_PST = 1
43
µs
AUTO_PRE = 1, AUTO_PST = 1
64
tERS
Time for sector erase or mass erase
9
ms
NMAX_PGM
Maximum number of pulses to complete
program operation
5
NMAX_ERS
Maximum number of pulses to complete
erase operation
Number of erase or program cycles
<1000
34
Number of erase or program cycles
>1000 and <20000
334
Table 5-51 lists the characteristics of the SRAM.
Table 5-51. SRAM
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ISRAM_EN
Current consumption of one SRAM bank when enabled
VCORE = 1.2 V
0.55
20.5
µA
VCORE = 1.4 V
1.90
31
ISRAM_RET
Current consumption of one SRAM block under retention
VCORE = 1.2 V
29
1700
nA
VCORE = 1.4 V
36
2300
tSRAM_EN, one
Time taken to enable one SRAM bank
8
10
µs
tSRAM_DIS, one
Time taken to disable one SRAM bank
8
10
µs
tSRAM_EN, all
Time taken to enable all SRAM banks except Bank 0
18
21
µs
tSRAM_DIS, all
Time taken to disable all SRAM banks except Bank 0
8
10
µs



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