MSP432P411VIPZ datasheet(71/212 Pages) TI1

71 / 212 page

MSP432P4111, MSP432P4011, MSP432P411Y

MSP432P401Y, MSP432P411V, MSP432P401V

www.ti.com

SLASEA0A – DECEMBER 2017 – REVISED FEBRUARY 2018

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Product Folder Links: MSP432P4111 MSP432P4011 MSP432P411Y MSP432P401Y MSP432P411V MSP432P401V

Specifications

Table 5-30 lists the dynamic parameters of the ADC.

(1)

VeREF- pin should be connected to onboard ground for ADC14VRSEL = 0xE.

(2)

ADC clock derived from HFXT oscillator.

Table 5-30. Precision ADC Dynamic Parameters(1)

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

SINAD(2)

Signal-to-noise and distortion

1 Msps, ADC14DIF = 0, ADC14VRSEL = 0xE,

2.5-V reference, 20-kHz input sine,

LDO based operation

1 Msps, ADC14DIF = 0, ADC14VRSEL = 0xE,

2.5-V reference, 20-kHz input sine,

DC/DC based operation

1 Msps, ADC14DIF = 1, ADC14VRSEL = 0xE,

2.5-V reference, 20-kHz input sine

ENOB(2)

Effective number of bits

1 Msps, ADC14DIF = 0, ADC14VRSEL = 0xE,

2.5-V reference, 20-kHz input sine,

LDO based operation

11.5

11.8

bit

1 Msps, ADC14DIF = 0, ADC14VRSEL = 0xE,

2.5-V reference, 20-kHz input sine,

DC/DC based operation

11.3

1 Msps, ADC14DIF = 1, ADC14VRSEL = 0xE,

2.5-V reference, 20-kHz input sine

12.8

13.2

CMRR_DC

Common-mode rejection ratio,

Common-mode input signal = 0 to VREF pp at DC,

ADC14DIF = 1

CMRR_AC

Common-mode rejection ratio,

Common-mode input signal = 0 to VREF pp at

1 MHz, ADC14DIF = 1

PSRR_DC

Power supply rejection ratio,

AVCC = AVCC (min) to AVCC(max),

ADC14DIF = 0, ADC14VRSEL = 0xE

2.5

mV/V

AVCC = AVCC (min) to AVCC(max),

ADC14DIF = 1, ADC14VRSEL = 0xE

150

µV/V

PSRR_AC

Power supply rejection ratio,

dAVCC = 0.1 V at 1 kHz,

ADC14DIF = 0, ADC14VRSEL = 0xE

mV/V

dAVCC = 0.1 V at 1 kHz,

ADC14DIF = 1, ADC14VRSEL = 0xE

µV/V

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