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MSP432P411VIPZ Datenblatt(PDF) 27 Page - Texas Instruments |
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MSP432P411VIPZ Datenblatt(HTML) 27 Page - Texas Instruments |
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27 / 212 page ![]() 27 MSP432P4111, MSP432P4011, MSP432P411Y MSP432P401Y, MSP432P411V, MSP432P401V www.ti.com SLASEA0A – DECEMBER 2017 – REVISED FEBRUARY 2018 Submit Documentation Feedback Product Folder Links: MSP432P4111 MSP432P4011 MSP432P411Y MSP432P401Y MSP432P411V MSP432P401V Terminal Configuration and Functions Copyright © 2017–2018, Texas Instruments Incorporated Table 4-3. Signal Descriptions (continued) FUNCTION SIGNAL NAME SIGNAL NO. (1) SIGNAL TYPE (2) DESCRIPTION PZ RGC (5) VCORE is for internal use only. Do not use for external current loading. Connect VCORE to only the recommended capacitor value, CVCORE. Port Mapper (continued) PM_UCA1CLK 17 14 I/O Default mapping: Clock signal input in eUSCI_A1 SPI slave mode Clock signal output in eUSCI_A1 SPI master mode PM_UCA1RXD 18 15 I Default mapping: Receive data in eUSCI_A1 UART mode PM_UCA1SIMO 19 16 I/O Default mapping: Slave in, master out for eUSCI_A1 SPI mode PM_UCA1SOMI 18 15 I/O Default mapping: Slave out, master in for eUSCI_A1 SPI mode PM_UCA1STE 16 13 I/O Default mapping: Slave transmit enable for eUSCI_A1 SPI mode PM_UCA1TXD 19 16 O Default mapping: Transmit data for eUSCI_A1 UART mode PM_UCA2CLK 33 20 I/O Default mapping: Clock signal input for eUSCI_A2 SPI slave mode Clock signal output for eUSCI_A2 SPI master mode PM_UCA2RXD 34 21 I Default mapping: Receive data for eUSCI_A2 UART mode PM_UCA2SIMO 35 22 I/O Default mapping: Slave in, master out for eUSCI_A2 SPI mode PM_UCA2SOMI 34 21 I/O Default mapping: Slave out, master in for eUSCI_A2 SPI mode PM_UCA2STE 32 19 I/O Default mapping: Slave transmit enable for eUSCI_A2 SPI mode PM_UCA2TXD 35 22 O Default mapping: Transmit data for eUSCI_A2 UART mode PM_UCB2CLK 37 24 I/O Default mapping: Clock signal input for eUSCI_B2 SPI slave mode Clock signal output for eUSCI_B2 SPI master mode PM_UCB2SCL 39 26 I Default mapping: I2C clock for eUSCI_B2 I2C mode PM_UCB2SDA 38 25 I/O Default mapping: I2C data for eUSCI_B2 I2C mode PM_UCB2SIMO 38 25 I/O Default mapping: Slave in, master out for eUSCI_B2 SPI mode PM_UCB2SOMI 39 26 I/O Default mapping: Slave out, master in for eUSCI_B2 SPI mode PM_UCB2STE 36 23 I/O Default mapping: Slave transmit enable for eUSCI_B2 SPI mode Power AVCC1 45 32 – Analog power supply AVCC2 87 56 – Analog power supply AVSS1 43 30 – Analog ground supply AVSS2 84 53 – Analog ground supply AVSS3 40 27 – Analog ground supply DVCC1 13 10 – Digital power supply DVCC2 73 48 – Digital power supply DVSS1 15 12 – Digital ground supply DVSS2 72 47 – Digital ground supply DVSS3 82 51 – Must be connected to ground VCORE (5) 12 9 – Regulated core power supply (internal use only, no external current loading) VSW 14 11 – DC/DC converter switching output RTC RTCCLK 59 34 O RTC_C clock calibration output |
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