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MSP432P411VIPZ Datenblatt(PDF) 7 Page - Texas Instruments |
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MSP432P411VIPZ Datenblatt(HTML) 7 Page - Texas Instruments |
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7 / 212 page ![]() 1 P10.1/UCB3CLK/L38 2 P10.2/UCB3SIMO/UCB3SDA/L37 3 P10.3/UCB3SOMI/UCB3SCL/L36 4 P1.0/UCA0STE/L19 5 P1.1/UCA0CLK/L18 6 P1.2/UCA0RXD/UCA0SOMI/L17 7 P1.3/UCA0TXD/UCA0SIMO/L16 8 P1.4/UCB0STE/L15 9 P1.5/UCB0CLK/L14 10 P1.6/UCB0SIMO/UCB0SDA/L13 11 P1.7/UCB0SOMI/UCB0SCL/L12 12 VCORE 13 DVCC1 14 VSW 15 DVSS1 16 P2.0/PM_UCA1STE/L11 17 P2.1/PM_UCA1CLK/L10 18 P2.2/PM_UCA1RXD/PM_UCA1SOMI/L9 19 P2.3/PM_UCA1TXD/PM_UCA1SIMO/L8 20 P2.4/PM_TA0.1/L23 21 P2.5/PM_TA0.2/L22 22 P2.6/PM_TA0.3/L21 23 P2.7/PM_TA0.4/L20 24 P10.4/TA3.0/C0.7/L35 25 P10.5/TA3.1/C0.6/L34 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 P8.7/A18/L18 52 P9.0/A17/L17 53 P9.1/A16/L16 54 P6.0/A15/L15 55 P6.1/A14/L14 56 P4.0/A13/L13 57 P4.1/A12/L12 58 P4.2/ACLK/TA2CLK/A11 59 P4.3/MCLK/RTCCLK/A10 60 P4.4/HSMCLK/SVMHOUT/A9 61 P4.5/A8 62 P4.6/A7 63 P4.7/A6 64 P5.0/A5 65 P5.1/A4 66 P5.2/A3 67 P5.3/A2 68 P5.4/A1 69 P5.5/A0 70 P5.6/TA2.1/VREF+/VeREF+/C1.7 71 P5.7/TA2.2/VREF-/VeREF-/C1.6 72 DVSS2 73 DVCC2 74 P9.2/TA3.3/L33 75 P9.3/TA3.4/L32 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 7 MSP432P4111, MSP432P4011, MSP432P411Y MSP432P401Y, MSP432P411V, MSP432P401V www.ti.com SLASEA0A – DECEMBER 2017 – REVISED FEBRUARY 2018 Submit Documentation Feedback Product Folder Links: MSP432P4111 MSP432P4011 MSP432P411Y MSP432P401Y MSP432P411V MSP432P401V Terminal Configuration and Functions Copyright © 2017–2018, Texas Instruments Incorporated 4 Terminal Configuration and Functions 4.1 Pin Diagram for MSP432P411xI Devices Figure 4-1 shows the pinout of the 100-pin PZ package. A. The secondary digital functions on Ports P2, P3, and P7 are fully mappable. This pinout shows only the default mapping. See Section 6.9.2 for details. B. A glitch filter is implemented on these digital I/Os: P1.0, P1.4, P1.5, P3.0, P3.4, P3.5, P6.6, P6.7. C. UART BSL pins: P1.2 - BSLRXD, P1.3 - BSLTXD D. SPI BSL pins: P1.4 - BSLSTE, P1.5 - BSLCLK, P1.6 - BSLSIMO, P1.7 - BSLSOMI E. I2C BSL pins: P3.6 - BSLSDA, P3.7 - BSLSCL Figure 4-1. 100-Pin PZ Package (Top View) |
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