MSP432P411VIPZ datasheet(28/212 Pages) TI1

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MSP432P4111, MSP432P4011, MSP432P411Y

MSP432P401Y, MSP432P411V, MSP432P401V

SLASEA0A – DECEMBER 2017 – REVISED FEBRUARY 2018

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Product Folder Links: MSP432P4111 MSP432P4011 MSP432P411Y MSP432P401Y MSP432P411V MSP432P401V

Terminal Configuration and Functions

Table 4-3. Signal Descriptions (continued)

FUNCTION

SIGNAL NAME

SIGNAL NO. (1)

SIGNAL

TYPE (2)

DESCRIPTION

RGC

Reference

VREF+

Internal shared reference voltage positive terminal

VREF-

Internal shared reference voltage negative terminal

VeREF+

Positive terminal of external reference voltage to ADC

VeREF-

Negative terminal of external reference voltage to ADC

(recommended to connect to onboard ground)

SPI

UCA0CLK

I/O

Clock signal input for eUSCI_A0 SPI slave mode

Clock signal output for eUSCI_A0 SPI master mode

UCA0SIMO

I/O

Slave in, master out for eUSCI_A0 SPI mode

UCA0SOMI

I/O

Slave out, master in for eUSCI_A0 SPI mode

UCA0STE

I/O

Slave transmit enable for eUSCI_A0 SPI mode

UCA3CLK

N/A

I/O

Clock signal input for eUSCI_A3 SPI slave mode

Clock signal output for eUSCI_A3 SPI master mode

UCA3SIMO

N/A

I/O

Slave in, master out for eUSCI_A3 SPI mode

UCA3SOMI

N/A

I/O

Slave out, master in for eUSCI_A3 SPI mode

UCA3STE

N/A

I/O

Slave transmit enable for eUSCI_A3 SPI mode

UCB0CLK

I/O

Clock signal input for eUSCI_B0 SPI slave mode

Clock signal output for eUSCI_B0 SPI master mode

UCB0SIMO

I/O

Slave in, master out for eUSCI_B0 SPI mode

UCB0SOMI

I/O

Slave out, master in for eUSCI_B0 SPI mode

UCB0STE

I/O

Slave transmit enable for eUSCI_B0 SPI mode

UCB1CLK

N/A

I/O

Clock signal input for eUSCI_B1 SPI slave mode

Clock signal output for eUSCI_B1 SPI master mode

UCB1SIMO

N/A

I/O

Slave in, master out for eUSCI_B1 SPI mode

UCB1SOMI

N/A

I/O

Slave out, master in for eUSCI_B1 SPI mode

UCB1STE

N/A

I/O

Slave transmit enable for eUSCI_B1 SPI mode

UCB3CLK

I/O

Clock signal input for eUSCI_B3 SPI slave mode

Clock signal output for eUSCI_B3 SPI master mode

UCB3SIMO

I/O

Slave in, master out for eUSCI_B3 SPI mode

UCB3SOMI

I/O

Slave out, master in for eUSCI_B3 SPI mode

UCB3STE

100

I/O

Slave transmit enable for eUSCI_B3 SPI mode

System

NMI

External nonmaskable interrupt

RSTn

External reset (active low)

SVMHOUT

SVMH output

Thermal

QFN Pad

N/A

Pad

–

QFN package exposed thermal pad. TI recommends

connection to VSS.

MSP432P411VIPZ Datenblatt(PDF) 28 Page - Texas Instruments

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