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MSP432P411VIPZ Datenblatt(PDF) 102 Page - Texas Instruments |
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MSP432P411VIPZ Datenblatt(HTML) 102 Page - Texas Instruments |
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102 / 212 page ![]() 102 MSP432P4111, MSP432P4011, MSP432P411Y MSP432P401Y, MSP432P411V, MSP432P401V SLASEA0A – DECEMBER 2017 – REVISED FEBRUARY 2018 www.ti.com Submit Documentation Feedback Product Folder Links: MSP432P4111 MSP432P4011 MSP432P411Y MSP432P401Y MSP432P411V MSP432P401V Detailed Description Copyright © 2017–2018, Texas Instruments Incorporated Table 6-1. Peripheral Address Offsets (continued) ADDRESS RANGE PERIPHERAL TABLE REMARKS 0x4000_3400 to 0x4000_37FF COMP_E0 Table 6-15 16-bit peripheral 0x4000_3800 to 0x4000_3BFF COMP_E1 Table 6-16 16-bit peripheral 0x4000_3C00 to 0x4000_3FFF AES256 Table 6-17 16-bit peripheral 0x4000_4000 to 0x4000_43FF CRC32 Table 6-18 16-bit peripheral 0x4000_4400 to 0x4000_47FF RTC_C Table 6-19 16-bit peripheral 0x4000_4800 to 0x4000_4BFF WDT_A Table 6-20 16-bit peripheral 0x4000_4C00 to 0x4000_4FFF Port Module Table 6-21 16-bit peripheral 0x4000_5000 to 0x4000_53FF Port Mapping Controller Table 6-22 16-bit peripheral 0x4000_5400 to 0x4000_57FF Capacitive Touch I/O 0 Table 6-23 16-bit peripheral 0x4000_5800 to 0x4000_5BFF Capacitive Touch I/O 1 Table 6-24 16-bit peripheral 0x4000_5C00 to 0x4000_8FFF Reserved Read only, always reads 0h 0x4000_9000 to 0x4000_BFFF Reserved Read only, always reads 0h 0x4000_C000 to 0x4000_CFFF Timer32 Table 6-25 0x4000_D000 to 0x4000_D7FF Reserved Read only, always reads 0h 0x4000_D800 to 0x4000_DFFF Utility SRAM 0x4000_E000 to 0x4000_FFFF DMA Table 6-26 0x4001_0000 to 0x4001_03FF PCM Table 6-27 0x4001_0400 to 0x4001_07FF CS Table 6-28 0x4001_0800 to 0x4001_0FFF PSS Table 6-29 0x4001_1000 to 0x4001_17FF FLCTL_A Table 6-30 0x4001_1800 to 0x4001_1BFF Reserved Read only, always reads 0h 0x4001_1C00 to 0x4001_1FFF Reserved Read only, always reads 0h 0x4001_2000 to 0x4001_23FF Precision ADC Table 6-31 0x4001_2400 to 0x4001_27FF LCD_F Table 6-32 0x4001_2800 to 0x4001_2BFF Reserved Read only, always reads 0h 0x4001_2C00 to 0x4001_FFFF Reserved Read only, always reads 0h Table 6-2. Timer_A0 Registers (Base Address: 0x4000_0000) REGISTER NAME ACRONYM OFFSET Timer_A0 Control TA0CTL 00h Timer_A0 Capture/Compare Control 0 TA0CCTL0 02h Timer_A0 Capture/Compare Control 1 TA0CCTL1 04h Timer_A0 Capture/Compare Control 2 TA0CCTL2 06h Timer_A0 Capture/Compare Control 3 TA0CCTL3 08h Timer_A0 Capture/Compare Control 4 TA0CCTL4 0Ah Timer_A0 Counter TA0R 10h Timer_A0 Capture/Compare 0 TA0CCR0 12h Timer_A0 Capture/Compare 1 TA0CCR1 14h Timer_A0 Capture/Compare 2 TA0CCR2 16h Timer_A0 Capture/Compare 3 TA0CCR3 18h Timer_A0 Capture/Compare 4 TA0CCR4 1Ah Timer_A0 Interrupt Vector TA0IV 2Eh Timer_A0 Expansion 0 TA0EX0 20h |
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