WM8994ECSSLASHR datasheet(140/363 Pages) CIRRUS

140 / 363 page

WM8994

140

Rev 4.6

GPIO / INTERRUPT OUTPUTS FROM DC SERVO

When using the DC Servo Start-Up or DAC Write modes, the DCS_CAL_COMPLETE register

provides readback of the status of the DC offset correction. This can be read from register R88 as

described in Table 71.

The DCS_CAL_COMPLETE bits can also be used as inputs to the Interrupt control circuit and used to

trigger an Interrupt event -

see “Interrupts”.

The DCS_CAL_COMPLETE bits can also be used as inputs to the GPIO function and used to

generate external logic signals indicating the DC Servo status. See “General Purpose Input/Output”

for details of how to configure a GPIO pin to output the DC Servo status.

ANALOGUE OUTPUTS

The speaker, headphone, earpiece and line outputs are highly configurable and may be used in many

different ways.

SPEAKER OUTPUT CONFIGURATIONS

The speaker outputs SPKOUTL and SPKOUTR can be driven by either of the speaker mixers,

SPKMIXL or SPKMIXR, or by the low power, differential Direct Voice path from IN2LP/VRXN and

IN2RP/VRXP. Fine volume control is available on the speaker mixer paths using the SPKLVOL and

SPKRVOL PGAs. A boost function is available on both the speaker mixer paths and the Direct Voice

path. For information on the speaker mixing options,

refer to the “Analogue Output Signal Path”

section.

The speaker outputs SPKOUTL and SPKOUTR operate in a BTL configuration in Class AB or Class D

amplifier modes. The default mode is class D but class AB mode can be selected by setting the

SPKOUT_CLASSAB register bit, as defined in Table 74.

The speaker outputs can be configured as a pair of stereo outputs, or as a single mono output. Note

that, for applications requiring only a single speaker output, it is possible to improve the THD

performance by configuring the speaker outputs in mono mode. See “Typical Performance” for further

details.

The mono configuration is selected by applying a logic high input to the SPKMODE pin (A3), as

described in Table 73. For Stereo mode this pin should be connected to GND. Note that SPKMODE is

referenced to DBVDD.

An internal pull-up resistor is enabled by default on the SPKMODE pin; this can be configured using

the SPKMODE_PU register bit described in Table 74.

SPEAKER CONFIGURATION

SPKMODE PIN (A3)

Stereo Mode

GND

Mono Mode

DBVDD

Table 73 SPKMODE Pin Function

In the mono configuration, the P channels, SPKOUTLP and SPKOUTRP should be connected

together on the PCB, and similarly with the N channels, SPKOUTLN and SPKOUTRN, as illustrated in

Figure 34. In this configuration both left and right speaker drivers should be enabled

(SPKOUTL_ENA=1 and SPKOUTR_ENA=1), but path selection and volume controls are available on

left channel only (SPKMIXL, SPKLVOL and SPKOUTLBOOST).

Note that the minimum speaker load resistance and the maximum power output has a dependency on

the SPKMODE output configuration, and also on the Class D/AB mode selection. See “Electrical

Characteristics

” for further details.

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