SPSB100 datasheet(59/213 Pages) STMICROELECTRONICS

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5.2.2.2

Operation code

The operating code is used to distinguish among different access modes to the registers of the target device.

Table 10. Operation codes

OC1

OC0

Description

Write operation

Read operation

Read and clear operation

Read device information

A Write operation leads to a modification of the addressed data by the payload if a write access is allowed (for

example, control register, valid data). Beside this a shift out of the content (data present at Communication start)

of the same register is performed.

A Read operation shifts out the data present in the addressed register at Communication start. The SDI payload

data is ignored and internal data will not be modified. Burst read cannot be performed. Even if the first 8 bits of

SDO are sent during read device information, the chip must receive a full frame with CRC on SDI otherwise a

SPI_CLK_CNT and a SPI_CRC_ERR will be set generating a SPIE.

A Read and clear operation will lead to a clear of addressed status bits. The bits to be cleared are defined first

by address, second by payload data bits set to ‘1’. Beside this a shift out of the content (data present at

Communication start) of the same register is performed.

Note:

Status registers which change status during communication could be cleared by the actual Read and clear

operation and are neither reported in actual communication nor in the following communications. To avoid a loss

of any reported status it is recommended to clear status registers which have been read in the previous

communication (Selective bitwise clear).

5.2.2.3

Advanced operation code

A ‘clear all status registers’ command is performed when an OpCode ‘10’ at address b’111111 is performed.

5.2.2.4

Data-in payload

The payload (Data bits) is the data transferred to the device within every SPI communication. The payload always

follows the OpCode and the address bits.

For write access the payload represents the new data written to the addressed register. For read and clear

operations the payload defines which bits of the addressed status register will be cleared. In case of a ‘1’ at the

corresponding bit position the bit will be cleared.

For a Read operation the SDI payload is not used. For functional safety reasons it is recommended to set unused

payload to ‘0’.

5.2.2.5

SDO frame

The data-out frame consists of 32 bits (GSB + data bits + CRC).

The first eight transmitted bits contain device related status information (GSB) and are latched into the shift

The subsequent bytes contain the payload data together with the four LSB bits containing CRC and are latched

into the shift register with the eighth positive CLK edge.

This could lead to an inconsistency of data between the GSB and payload due to different shift register load

times. Anyhow, no unwanted status register clear should appear, as status information should just be cleared with

a dedicated bit clear after.

SPSB100

Serial peripheral interface (SPI)

DS14640 - Rev 2

page 59/213

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