SPSB100 datasheet(42/213 Pages) STMICROELECTRONICS

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To avoid extra current drain consumption in deep sleep due to the external pull up on NFSO1 pin, the default state

can be selected by user-NVM bit NFSO_STATE_IN_DEEP_SLEEP. When, NFSO_STATE_IN_DEEP_SLEEP = 0,

the NFSO1 pin is asserted (level low), instead when NFSO_STATE_IN_DEEP_SLEEP = 1, the NFSO1 in de-

asserted (level high) in DEEP-SLEEP.

Note:

NFSO1 state is HIGH, instead of LOW after a wake-up from DEEP-SLEEP when

NFSO_STATE_IN_DEEP_SLEEP = 1. So, it is suggested, to set after a wake-up from DEEP SLEEP the

NFSO_ASSERT_LOW = “1” then to set NFSO_ASSERT_LOW = “0”. NFSO1 pin level is defined by external

pull-up.

The state machine can only set NFSO_ASSERT_LOW to 1, while the MCU can set, reset and read it, making

NFSO1 pin fully controllable by the MCU in ACTIVE state.

The SPI bit NFSO1_ECHO is sensing the NFSO1 state on its silicon pad:

•

NFSO1_ECHO = 0: NFSO1 output pad is asserted low.

•

NFSO1_ECHO = 1: the NFSO1 output pad is pulled-up by external circuitry.

Figure 25. NFSO1 implementation details

After a battery plug, or after each power-up sequence, or during a power-down sequence, or in INIT, REC-1,

REC-2, DEEP-SLEEP states the NFSO1 pin is asserted low. This is insured by the state machine that sets the

SPI bit NFSO_ASSERT_LOW to 1. In ACTIVE state the MCU can decide to release the NFSO1 pin through the

SPI when the application is ready to start.

SPSB100

Functional description

DS14640 - Rev 2

page 42/213

SPSB100 Datenblatt(PDF) 42 Page - STMicroelectronics