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SPSB100 Datenblatt(PDF) 71 Page - STMicroelectronics

Teilenummer SPSB100
Bauteilbeschribung  Automotive power management IC for highly integrated processors
PDF  213 Pages
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Hersteller  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
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SPSB100 Datenblatt(HTML) 71 Page - STMicroelectronics

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Ground loss protection parameter depends mainly on the implementation. This monitor measures a ground shift
between GND and SGND pins.
7.3
Oscillator
The voltages are referred to GND and currents are assumed positive, when the current flows into the pin.
6 V ≤ VFBB ≤ 29 V, Tj = -40 °C to 150 °C, unless otherwise specified.
Table 24. Oscillator
Symbol
Parameter
Condition
Min
Typ
Max
Unit
FCLK800K
Oscillation frequency
640
800
960
kHz
FCLK33M6_MAIN
Oscillation frequency
26.88
33.6
40.32
MHz
FCLK33M6_MON
Oscillation frequency
26.88
33.6
40.32
MHz
7.4
Power-on reset
All outputs open; Tj = -40 °C to 150 °C, unless otherwise specified.
Table 25. Power-on reset
Symbol
Parameter
Condition
Min
Typ
Max
Unit
VPORVS_R
VS POR rising threshold
4.5
4.85
5.2
V
VPORVS_F(1)
VS POR falling threshold
1.9
2.1
2.3
V
VPORVS_HYS
VS POR hysteresis
2.5
2.75
3
V
1. This threshold is valid if VS had already reached VPORVS_R(max) previously.
7.5
LDO1 voltage regulator
The voltages are referred to GND and currents are assumed positive, when the current flows into the pin.
6 V ≤ VFBB ≤ 29 V, Tj = -40 °C to 150 °C, unless otherwise specified.
Table 26. LDO1
Symbol
Parameter
Condition
Min
Typ
Max
Unit
VLDO1
Output voltage tolerance.
Including line and load regulation
ILOAD = 100 µA to 120 mA
6.0 V ≤ VFBB ≤ 29 V
4.9
5.0
5.15
V
VLDO1_PG
Power-good rising threshold
VLDO1 increasing
4.6
4.8
4.9
V
VLDO1_UV
Undervoltage falling threshold
VLDO1 decreasing
3.8
4.0
4.1
V
tLDO1_PG_TO(1)
LDO1 timeout for power-good
4.8
6
7.5
ms
tLDO1_UV(1)
Undervoltage filter time
12
15
22
µs
VLDO1_DP
Drop-out voltage
ILOAD = 120 mA
-
-
0.8
V
ILDO1_Cmax
Short circuit output current (to GND)
Current limitation
130
175
250
mA
CLDO1(2)
Load capacitor1
Ceramic (±20%)
1
-
10
µF
1. Digital implementation is guaranteed by scan test.
2. Nominal capacitor value required for stability of the regulator. Tested with 1 µF ceramic (± 20%). The capacitor must be
located close to the regulator output pin. A 2.2 μF capacitor value is recommended to minimize the DPI (Direct power
injection ) stress in the application.
SPSB100
Electrical characteristics
DS14640 - Rev 2
page 71/213



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