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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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SPSB100 Datenblatt(PDF) 97 Page - STMicroelectronics |
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SPSB100 Datenblatt(HTML) 97 Page - STMicroelectronics |
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97 / 213 page  1. Digital implementation is guaranteed by scan test. 7.15 SPI The voltages are referred to GND and currents are assumed positive, when the current flows into the pin. 3 V ≤ VIO ≤ 5.4 V, Tj = -40 °C to 150 °C, unless otherwise specified. Table 36. Input: CSN Symbol Parameter Condition Min Typ Max Unit VCSN_L Input voltage low threshold 1.0 - - V VCSN_H Input voltage high threshold - - 2.3 V VCSN_HYS VCSN_H - VCSN_L 0.2 0.4 - V RCSN_PU CSN pull-up resistor V(1) = 1.0 V 13 29 55 kΩ CCSN(1) 0 V < V(1) < 5.3 V - 10 15 pF 1. The value of input capacity is not measured in production test. Parameter guaranteed by design. Table 37. Inputs: CLK, SDI Symbol Parameter Condition Min Typ Max Unit VCLK_L CLK input low threshold 1.0 - - V VSDI_L SDI input low threshold 1.0 - - V VCLK_H CLK input high threshold - - 2.3 V VSDI_H SDI input high threshold - - 2.3 V VCLK_HYS CLK input hysteresis 0.2 - - V VSDI_HYS SDI input hysteresis 0.2 - - V ICLK CLK pull-down current at input VCLK = 1.0 V 5 20 60 µA ISDI SDI pull-down current at input VSDI = 1.0 V 5 20 60 µA Cin(1) Input capacitance at input CLK, and SDI 0 V < VCLK,SDI < 5.3 V - 10 15 pF fCLK SPI input frequency at CLK - - 6 MHz 1. The value of input capacity is not measured in production test. Parameter guaranteed by design. Table 38. SDI, CLK and CSN timing Symbol Parameter Condition Min Typ Max Unit tCLK Clock period 166 - - ns tCLK_H Clock high time 58 - - ns tCLK_L Clock low time 58 - - ns tset_CSN CSN setup time, CSN low before rising edge of CLK in active full power mode 150 - - ns tset_CSN_LP CSN setup time, CSN low before rising edge of CLK in active low power mode 10000 - - ns tset_CLK CLK setup time, CLK high before rising edge of CSN 150 - - ns tset_SDI SDI setup time 25 - - ns thold_SDI SDI hold time 25 - - ns tr_in(1) Rise time of input signal SDI, CLK, CSN - 25 ns SPSB100 Electrical characteristics DS14640 - Rev 2 page 97/213 |
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