SPSB100 datasheet(38/213 Pages) STMICROELECTRONICS

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The USER-NVM emulated values are lost if power supply at VS pin is below VPORVS_R.

During emulation mode the value of U_NVM_CRC0 and U_NVM_CRC1 bits in DCR17 and DCR25 is not

considered by the device.

In USER-NVM emulation mode the runtime check of USER-NVM is disabled. For this reason, the USER-NVM

emulation mode shall be used for debug purpose only.

3.8.3

USER-NVM programming procedure

The user can emulate the USER-NVM as many times as he wants as far as the USER-NVM is not programmed

by the user. Once programmed by user, the USER-NVM cannot be emulated and the device proceeds with valid

data stored in USER-NVM.

To program USER-NVM, it is necessary to first emulate the USER-NVM with desired configuration. During this

emulation for programming, the user must perform at least write to DCR17 and DCR25 with any value

corresponding to its need. This is needed to initiate some bits that will be used to allow proper programming.

USER-NVM uses NVM CRC to check that NVM content is correct but during programming, the user does not

have to care of this because the correct CRC will be calculated by SPSB100 from emulated data and will be

programmed with emulated data.

Then, instead of GO_INIT bit set through SPI access, the user must set the U-NVM_PROG bit (only after

SPI_PROTECT_ACCESS has been set). This starts the USER-NVM programming and sets the device in USER-

NVM-PROG-2 state.

When the USER-NVM programming is completed, the status bit NVM_PROG_DONE is set. The user can read

this status bit through SPI access. When this bit is set, the user can read the NVM_PROG_OK status bit to verify

that the USER-NVM programming has completed correctly because the USER-NVM programming is followed by

the USER-NVM verification.

If the USER-NVM programming has failed and the NVM_PROG_OK status bit is low when the

NVM_PROG_DONE status bit is set, the user may request a new programming by resetting the U-NVM_PROG

control bit (only after SPI_PROTECT_ACCESS has been set) then setting again this bit. This operation can be

done 2 times, so there is a maximum programming of 3 times. If at the end of 3 USER_NVM programming

request, NVM_PROG_OK is still low when NVM_PROG_DONE is high, the chip cannot anymore be programmed

and cannot start correctly. In this case, any new programming request is ignored.

After valid USER-NVM programming procedure the U_NVM SPI registers from DCR10 to DRC28 can be only

readable.

3.8.4

Loading USER-NVM data in RAM image

To program the USER-NVM it is necessary to load the data (CRC included) in a dedicated portion of the RAM. It

is automatically done by state machine.

3.9

Wake-up inputs: IGN and WU

Both inputs can be configured as wake-up sources (through IGN_ENA and WU_ENA control bits). In particular,

the input IGN can be used as a wake-up source connected to ignition (KL15) via a resistor.

The voltage can be also read back via SPI through a 10-bit ADC monitoring (IGN[9..0] bits, in addition to WU[9..0]

ones). This can be achieved only if WU_CONFIG bit and IGN_CONFIG bit are set to ”1”.

Each wake-up input is sensitive to any level transition (positive and negative edge) and can be configured for

static or cyclic monitoring of the input voltage level by suitable setting of bits WU_FILT and IGN_FILT which allows

to choose the monitoring among static or cyclic with timer. When the configuration of a timer is changed, the timer

is automatically restarted using the new configuration.

For static contact monitoring, a filter time of tWU_stat, tIGN_stat is implemented. The filter is started when the input

voltage crosses the specified threshold Vwuthp, VIGNthp (both thresholds are linked to VFBB level). Wake-up status

bit (WU_WAKE and IGN_WAKE bits) is set only if this threshold is passed for more than tWU_stat, tIGN_stat.

Cyclic contact monitoring allows instead periodical (not threshold dependent) activation of the wake-up input to

read the status of the external contact. The periodical activation is driven by timer whose settings (on-time and

period) can be configured through T1_PER[2..0] and T1_ENA[2..0] bits.

The input signal is filtered with a filter time of tWU_cyc (tIGN_cyc ) after a delay (80% of the configured timer on-

time). A wake-up will be processed if the status has changed versus the previous cycle, therefore wake-up status

WU_WAKE and IGN_WAKE bits are set only if the status during consecutive on-time is different, after configured

delay and tWU_cyc. (tIGN_cyc). This can be done only if WU_CONFIG and IGN_CONFIG are configured as wake-

up inputs.

SPSB100

Functional description

DS14640 - Rev 2

page 38/213

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