SPSB100 datasheet(60/213 Pages) STMICROELECTRONICS

60 / 213 page

Figure 35. SDO frame

FE1

Global Status Byte (GSB)

DATA Byte 2

DATA Byte 1

RSTB

GSBN

SPIE FE2

MSB

LSB

time

DATA Byte 3

time

CRC

5.2.2.6

Global status byte (GSB)

Bits 0 to 5 represent a logical OR combination of bits located in the status registers. Therefore, no direct read and

clear can be performed on these bits inside the GSB.

Table 11. Global status byte

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

GSBN

RSTB

SPIE

RES

FE1

•

Global status bit not (GSBN)

The GSBN is a logically NOR combination of bit 0 to bit 6. This bit can also be used as a global status flag

without starting a complete communication frame as it is present directly after pulling CSN low.

OUTHS open load can be masked in GSBN by setting bit MASK_OL_GSB.

Global warning can be masked in GSBN by setting bit MASK_GW_GSB.

•

Reset bit (RSTB)

The RSTB indicates a SPSB100 reset. In case this bit is set, all internal control and status registers are set

to default.

The RSTB bit is cleared after a read and clear of the VPOR bit in the status registers which caused the

reset event.

•

SPI error (SPIE)

•

Functional error 1 (FE1)

The FE1 is a logical OR combination of errors coming from functional blocks.

•

Device error (DE)

The DE is a logical OR combination of errors related to device specific blocks.

•

Global warning (GW)

The GW is a logical OR combination of warning flags (for example, thermal warning).

Thermal warning can be masked in GW by setting bit MASK_TW_GW.

•

Fail-safe (FS)

The FS bit indicates that the device was forced into a safe state due to mistreatment or critical internal

errors (for example, watchdog failure, voltage regulator failure).

5.2.2.7

Data-out payload

The data-out payload (20 data bits + 4 CRC bits) is the data transferred from the target device within every SPI

communication to the controller device.

SPSB100

Serial peripheral interface (SPI)

DS14640 - Rev 2

page 60/213

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