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SPSB100 Datenblatt(PDF) 133 Page - STMicroelectronics |
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SPSB100 Datenblatt(HTML) 133 Page - STMicroelectronics |
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133 / 213 page ![]() Table 102. DCR8 (0x08) MSB description Bit Name Description 23 RES reserved 22 MASK_SWDBG_VIO_IRQ Mask IRQ when SWDBG is still at VIO at the end of timeout detection. In this case, watchdog is restarted with a long open window and SWDBG is ignored. 1: IRQ is masked 0: IRQ not masked 21 MASK_LP_READY_IRQ Mask IRQ when FSM goes to low power state. 1: IRQ is masked 0: IRQ not masked 20 CLR_TSD_CNT_FAIL Clear TSD_CNT_FAIL to 0 This bit is always read low 19 MASK_BUCK3_OC_POWER_OFF Mask regulator over current as source of its power off 1: Regulator is not turned off after an over current occurs 0: Regulator is turned off after an over current occurs 18 MASK_BUCK2_OC_POWER_OFF Mask regulator over current as source of its power off 1: Regulator is not turned off after an over current occurs 0: Regulator is turned off after an over current occurs 17 MASK_BUCK1_OC_POWER_OFF Mask regulator over current as source of its power off 1: Regulator is not turned off after an over current occurs 0: Regulator is turned off after an over current occurs 16 MASK_BUCK3_UV_POWER_OFF Mask regulator under voltage as source of its power off 1: Regulator is not turned off after an under voltage occurs 0: Regulator is turned off after an under voltage occurs Table 103. DCR8 (0x08) Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 0 (R/W) 0 (R/W) 0 (R/W) 0 (R/W) 0 (R/W) 0 (R/W) 0 (R/W) 0 (R/W) MASK_BUCK2_UV_POWER_OFF MASK_BUCK1_UV_POWER_OFF MASK_TW_GW MASK_OL_GSB RES MASK_GW_GSB RES RES Mask BUCK2 undervoltage power off bit Mask BUCK1 undervoltage power off bit Mask thermal warning GW bit Mask open load GSB bit RES Mask global warning GSB bit RES Reserved Table 104. DCR8 (0x08) description Bit Name Description 15 MASK_BUCK2_UV_POWER_OFF Mask regulator undervoltage as source of its power off 1: Regulator is not turned off after an undervoltage occurs 0: Regulator is turned off after an undervoltage occurs 14 MASK_BUCK1_UV_POWER_OFF Mask regulator undervoltage as source of its power off 1: Regulator is not turned off after an undervoltage occurs 0: Regulator is turned off after an undervoltage occurs 13 MASK_TW_GW Mask thermal Warnings 1: Thermal warnings are masked in GW 0: Thermal warnings are not masked (default) 12 MASK_OL_GSB Mask open-load 1: Open-load condition at OUTHS is masked It is reported as a functional error 1 (GSB bit 3) but not as a global error (GSB bit 7) SPSB100 SPI registers DS14640 - Rev 2 page 133/213 |
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