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SPSB100 Datenblatt(PDF) 144 Page - STMicroelectronics |
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SPSB100 Datenblatt(HTML) 144 Page - STMicroelectronics |
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144 / 213 page ![]() Table 136. DCR14 (0x0E) LSB description Bit Name Description 7 LDO1_PD_STEP_OFF_0 6 LDO1_PU_STEP_ENA_2 To define LDO1 turn-on steps 000: LDO1 is not turned ON 001: Step 1 010: Step 2 011: Step 3 100: Step 4 101: Step 5 110: Step 6 111: Step 7 5 LDO1_PU_STEP_ENA_1 4 LDO1_PU_STEP_ENA_0 3 CRC 3 2 CRC 2 1 CRC 1 0 CRC 0 Table 137. DCR15 (0x0F) MSB Bit 23 Bit 22 Bit 21 Bit 20 Bit 19 Bit 18 Bit 17 Bit 16 - (R0) - (R0) - (R0) - (R0) - (R) - (R) - (R) - (R) RES RES RES RES U_NVM_F_15 U_NVM_F_14 PU_WAIT_DEL_ENA_7_1 PU_WAIT_DEL_ENA_7_0 Reserved Reserved Reserved Reserved User NVM F register bit 15 User NVM F register bit 14 Pull-up wait delay enable 7 bit 1 Pull-up wait delay enable 7 bit 0 Table 138. DCR15 (0x0F) MSB description Bit Name Description 23 RES Reserved 22 RES Reserved 21 RES Reserved 20 RES Reserved 19 U_NVM_F_15 User NVM regs Can be emulated when FSM in U_PROG_1 state 18 U_NVM_F_14 17 PU_WAIT_DEL_ENA_7_1 Power up delay at step 7 00: 0 ms 01: 2 ms 10: 5 ms 11: 10 ms 16 PU_WAIT_DEL_ENA_7_0 SPSB100 SPI registers DS14640 - Rev 2 page 144/213 |
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