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SPSB100 Datenblatt(PDF) 147 Page - STMicroelectronics |
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SPSB100 Datenblatt(HTML) 147 Page - STMicroelectronics |
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147 / 213 page ![]() Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 NRESET_PD_STEP_ASSERT_1 NRESET_PD_STEP_ASSERT_0 NRESET_PU_STEP_DEASSERT_2 NRESET_PU_STEP_DEASSERT_1 NRESET_PU_STEP_DEASSERT_0 PU_WAIT_PG_ ENA_7 PU_WAIT_PG_ ENA_6 PU_WAIT_PG_ ENA_5 NRESET pull-down step assertion bit 1 NRESET pull-down step assertion bit 0 NRESET pull-up step deassertion bit 2 NRESET pull-up step deassertion bit 1 NRESET pull-up step deassertion bit 0 Pull-up wait power good enable bit 7 Pull-up wait power good enable bit 6 Pull-up wait power good enable bit 5 Table 146. DCR16 (0x10) description Bit Name Description 15 NRESET_PD_STEP_ASSERT_1 14 NRESET_PD_STEP_ASSERT_0 13 NRESET_PU_STEP_DEASSERT_2 To define NRESET deassertion and WD start step 000: End of step 7 001: Step 1 010: Step 2 011: Step 3 100: Step 4 101: Step 5 110: Step 6 111: Step 7 12 NRESET_PU_STEP_DEASSERT_1 11 NRESET_PU_STEP_DEASSERT_0 10 PU_WAIT_PG_ENA_7 1: At power-up step 7 waits for power-good signal 0: At power-up step 7 does not wait for a power-good signal 9 PU_WAIT_PG_ENA_6 1: At power-up step 6 waits for power-good signal 0: At power-up step 6 does not wait for a power-good signal 8 PU_WAIT_PG_ENA_5 1: At power-up step 5 waits for power-good signal 0: At power-up step 5 does not wait for a power-good signal Table 147. DCR16 (0x10) LSB Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 - (R) - (R) - (R) - (R) - (R) - (R) - (R) - (R) PU_WAIT_PG_ENA_4 PU_WAIT_PG_ENA_3 PU_WAIT_PG_ENA_2 PU_WAIT_PG_ENA_1 CRC3 CRC2 CRC1 CRC0 Pull-up wait power-good enable bit 4 Pull-up wait power-good enable bit 3 Pull-up wait power-good enable bit 2 Pull-up wait power-good enable bit 1 Cyclic redundancy checking bit 3 Cyclic redundancy checking bit 2 Cyclic redundancy checking bit 1 Cyclic redundancy checking bit 0 Table 148. DCR16 (0x10) LSB description Bit Name Description 7 PU_WAIT_PG_ENA_4 1: At power-up step 4 waits for power-good signal 0: At power-up step 4 does not wait for a power-good signal 6 PU_WAIT_PG_ENA_3 1: At power-up step 3 waits for power-good signal 0: At power-up step 3 does not wait for a power-good signal 5 PU_WAIT_PG_ENA_2 1: At power-up step 2 waits for power-good signal 0: At power-up step 2 does not wait for a power-good signal 4 PU_WAIT_PG_ENA_1 1: At power-up step 1 waits for power-good signal 0: At power-up step 1 does not wait for a power-good signal SPSB100 SPI registers DS14640 - Rev 2 page 147/213 |
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