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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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SPSB100 Datenblatt(PDF) 149 Page - STMicroelectronics |
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SPSB100 Datenblatt(HTML) 149 Page - STMicroelectronics |
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149 / 213 page  Table 153. DCR17 (0x11) LSB Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 - (R) - (R) - (R) - (R) - (R) - (R) - (R) - (R) NFSO_STATE_IN_DEEP_SLEEP U_NVM_H_2 U_NVM_H_1 BOOST_DIS CRC3 CRC2 CRC1 CRC0 Set NFSO default state in DEEP- SLEEP bit User NVM H register bit 2 User NVM H register bit 1 BOOST disable bit Cyclic redundancy checking bit 3 Cyclic redundancy checking bit 2 Cyclic redundancy checking bit 1 Cyclic redundancy checking bit 0 Table 154. DCR17 (0x11) LSB description Bit Name Description 7 NFSO_STATE_IN_DEEP_SLEEP 1: NFSO pin is high when FSM is in DEEP-SLEEP state 0: NFSO pin is low when FSM is in DEEP-SLEEP state 6 U_NVM_H_2 5 U_NVM_H_1 4 BOOST_DIS 1: Disable boost 0: Boost is not disabled and depends on BOOST_OFF control bit 3 CRC 3 2 CRC 2 1 CRC 1 0 CRC 0 Table 155. DCR18 (0x12) MSB Bit 23 Bit 22 Bit 21 Bit 20 Bit 19 Bit 18 Bit 17 Bit 16 - (R0) - (R0) - (R0) - (R0) - (R) - (R) - (R) - (R) RES RES RES RES PD_WAIT_VREG_DEL_OFF_1 PD_WAIT_VREG_DEL_OFF_0 PD_WAIT_DEL_OFF_7_1 PD_WAIT_DEL_OFF_7_0 Reserved Reserved Reserved Reserved Pull-down wait VREG delay off bit 1 Pull-down wait VREG delay off bit 0 Pull-down wait delay off 7 bit 1 Pull-down wait delay off 7 bit 0 Table 156. DCR18 (0x12) MSB description Bit Name Description 23 RES Reserved 22 RES Reserved 21 RES Reserved 20 RES Reserved 19 PD_WAIT_VREG_DEL_OFF_1 Power-down delay for Vreg 00: 2 ms 01: 5 ms 10: 10 ms 11: 20 ms 18 PD_WAIT_VREG_DEL_OFF_0 17 PD_WAIT_DEL_OFF_7_1 Power-down delay at step 7 00: 0 ms 01: 2 ms 10: 5 ms 11: 10 ms SPSB100 SPI registers DS14640 - Rev 2 page 149/213 |
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