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SPSB100 Datenblatt(PDF) 114 Page - STMicroelectronics |
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SPSB100 Datenblatt(HTML) 114 Page - STMicroelectronics |
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114 / 213 page ![]() Bit Mode 0x0E DCR14 LSB R/W LDO1_PD_STEP_OFF_0 LDO1_PU_STEP_ENA_2 LDO1_PU_STEP_ENA_1 LDO1_PU_STEP_ENA_0 0x0F DCR15 MSB RES RES RES RES R/W PU_WAIT_DEL_ENA_6_1 PU_WAIT_DEL_ENA_6_0 PU_WAIT_DEL_ENA_5_1 PU_WAIT_DEL_ENA_5_0 LSB PU_WAIT_DEL_ENA_2_1 PU_WAIT_DEL_ENA_2_0 PU_WAIT_DEL_ENA_1_1 PU_WAIT_DEL_ENA_1_0 0x!0 DCR16 MSB RES RES RES RES R/W NRESET_PD_STEP_ASSERT_1 NRESET_PD_STEP_ASSERT_0 NRESET_PU_STEP_DEASSERT_2 NRESET_PU_STEP_DEASSERT_1 LSB PU_WAIT_PG_ENA_4 PU_WAIT_PG_ENA_3 PU_WAIT_PG_ENA_2 PU_WAIT_PG_ENA_1 0x11 DCR17 MSB RES RES RES RES R/W U_NVM_CRC0_3 U_NVM_CRC0_2 U_NVM_CRC0_1 U_NVM_CRC0_0 LSB NFSO_STATE_IN_DEEP_SLEEP U_NVM_H_2 U_NVM_H_1 BOOST_DIS 0x12 DCR18 MSB RES RES RES RES R/W PD_WAIT_DEL_OFF_6_1 PD_WAIT_DEL_OFF_6_0 PD_WAIT_DEL_OFF_5_1 PD_WAIT_DEL_OFF_5_0 LSB PD_WAIT_DEL_OFF_2_1 PD_WAIT_DEL_OFF_2_0 PD_WAIT_DEL_OFF_1_1 PD_WAIT_DEL_OFF_1_0 0x13 DCR19 MSB RES RES RES RES R/W U_NVM_RELEASE_11 U_NVM_RELEASE_10 U_NVM_RELEASE_9 U_NVM_RELEASE_8 LSB U_NVM_RELEASE_3 U_NVM_RELEASE_2 U_NVM_RELEASE_1 U_NVM_RELEASE_0 0x14 DCR20 MSB RES RES RES RES R/W U_NVM_K_11 U_NVM_K_10 U_NVM_K_9 U_NVM_K_8 LSB LOW_SET_3 LOW_SET_2 LOW_SET_1 LOW_SET_0 0x15 DCR21 MSB RES RES RES RES R/W U_NVM_L_11 U_NVM_L_10 U_NVM_L_9 U_NVM_L_8 LSB U_NVM_L_3 U_NVM_L_2 U_NVM_L_1 U_NVM_L_0 0x16 DCR22 MSB RES RES RES RES R/W U_NVM_M_11 U_NVM_M_10 U_NVM_M_9 U_NVM_M_8 LSB U_NVM_M_3 U_NVM_M_2 U_NVM_M_1 U_NVM_M_0 0x17 DCR23 MSB RES RES RES RES R/W U_NVM_N_11 U_NVM_N_10 U_NVM_N_9 U_NVM_N_8 LSB U_NVM_N_3 U_NVM_N_2 U_NVM_N_1 U_NVM_N_0 0x18 DCR24 MSB RES RES RES RES R/W U_NVM_O_11 U_NVM_O_10 U_NVM_O_9 U_NVM_O_8 LSB U_NVM_O_3 U_NVM_O_2 U_NVM_O_1 U_NVM_O_0 0x19 DCR25 MSB RES RES RES RES R/W U_NVM_CRC1_3 U_NVM_CRC1_2 U_NVM_CRC1_1 U_NVM_CRC1_0 LSB U_NVM_P_3 U_NVM_P_2 U_NVM_P_1 U_NVM_P_0 0x1C DCR28 MSB RES TEST_REG_PAGE_FUNC RES RES R/W RES RES RES RES LSB RES RES RES RES Table 56. U_NVM register overview (bit 27...24) lower nibbles Bit Mode 27 26 25 24 OpCode + address A3 A2 A1 A0 R/W U_NVM register Bit Mode Addr. 19 18 17 16 11 10 9 8 CRC 3 CRC 2 CRC 1 CRC 0 0x0A DCR10 MSB BUCK1_FREQ BUCK1_PU_VALUE_1 BUCK1_PU_VALUE_0 BUCK1_PU_STEP_ENA_2 R/W BUCK1_PD_STEP_OFF_0 BUCK1_IPEAK_2 BUCK1_IPEAK_1 BUCK1_IPEAK_0 LSB CRC 3 CRC 2 CRC 1 CRC 0 0x0B DCR11 MSB BUCK2_FREQ BUCK2_PU_VALUE_1 BUCK2_PU_VALUE_0 BUCK2_PU_STEP_ENA_2 R/W BUCK2_PD_STEP_OFF_0 BUCK2_IPEAK_2 BUCK2_IPEAK_1 BUCK2_IPEAK_0 LSB CRC 3 CRC 2 CRC 1 CRC 0 0x0C DCR12 MSB BYPASS_DIS BUCK3_PU_VALUE_2 BUCK3_PU_VALUE_1 BUCK3_PU_VALUE_0 R/W BUCK3_PD_STEP_OFF_1 BUCK3_PD_STEP_OFF_0 BUCK3_IPEAK_1 BUCK3_IPEAK_0 SPSB100 SPI registers DS14640 - Rev 2 page 114/213 |
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