28HS01GTAM03 datasheet(26/138 Pages) INFINEON

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Datasheet

26 of 138

002-18216 Rev. *W

2022-01-18

256Mb/512Mb/1Gb SEMPER™ Flash

Octal interface, 1.8V/3.0V

Address space maps

3.5

Registers

Registers are small groups of memory cells used to configure how the HS/L-T family memory device operates, or

to report the status of device operations. The registers are accessed by specific commands and addresses.

Table 8 shows the address map for every available register in this flash memory device.

Table 7

SSR address map

Region

Byte address range

Contents

Initial delivery state

Region 0

000h

LSB of CYPRESS™ Programmed Random Number

CYPRESS™ Programmed Random Number

...

00Fh

MSB of CYPRESS™ Programmed Random Number

010h to 013h

Region Locking Bits

Byte 10h [bit 0] locks region 0 from programming

when = 0

...

Byte 13h [bit 7] locks region 31 from programming

when = 0

All Bytes = FFh

014h to 01Fh

Reserved for Future Use (RFU)

Region 1

020h to 03Fh

Available for User Programming

Region 2

040h to 05Fh

...

Region 31

3E0h to 3FFh

Table 8

Function

Volatile component

address (hex)

Nonvolatile compo-

nent address (hex)

Device status

Status Register 1

STR1N[7:0], STR1V[7:0]

0x00800000

0x00000000

Status Register 2

STR2V[7:0]

0x00800001

N/A

Device configuration

Configuration Register 1

CFR1N[7:0], CFR1V[7:0]

0x00800002

0x00000002

Configuration Register 2

CFR2N[7:0], CFR2V[7:0]

0x00800003

0x00000003

Configuration Register 3

CFR3N[7:0], CFR3V[7:0]

0x00800004

0x00000004

Configuration Register 4

CFR4N[7:0], CFR4V[7:0]

0x00800005

0x00000005

Configuration Register 5

CFR5N[7:0], CFR5V[7:0]

0x00800006

0x00000006

Interface CRC

Interface CRC Enable Register

ICEV[7:0]

0x00800008

N/A

Infineon® Endurance

Flex architecture