28HS01GTAM03 datasheet(92/138 Pages) INFINEON

92 / 138 page

Datasheet

92 of 138

002-18216 Rev. *W

2022-01-18

256Mb/512Mb/1Gb SEMPER™ Flash

Octal interface, 1.8V/3.0V

Registers

5.23

INT# pin status register (INSV) - Octal Only

The INT# Pin Status Register (INSV) indicates which internal event(s) has occurred since the last time the ISR was

cleared.

5.24

Infineon® Endurance Flex architecture selection register (EFXx)

The Infineon® Endurance Flex architecture Selection registers (EFXx) define the long retention / high endurance

regions based on a four pointer based architecture.

Table 69

Interrupt status register

Bit

number

Name

Function

Read/Write

N = Nonvolatile

V = Volatile

Factory default

(binary)

Description

INSV[7:5]

RESRVD

Reserved for Future

Use

V -> R/W

111

These bits are Reserved for future use. This bit must always be

written/loaded to its default state.

INSV[4]

REYBSY

Ready/Busy

Transition

V -> R/W

Description: The REYBSY bit indicates whether the device's

ready/busy status has caused a transition on INT#.

Selection Options:

0 = A Busy to Ready transition has occurred

1 = A Busy to Ready transition has not occurred

Dependency: N/A

INSV[3:2]

RESRVD

Reserved for Future

Use

V -> R/W

These bits are Reserved for future use. This bit must always be

written/loaded to its default state.

INSV[1]

ECC2BT

ECC 2-bit Error

Detection

V -> R/W

Description: The ECC2BT bit indicates whether a 2-bit ECC

detection error has caused a transition on INT#.

Selection Options:

0 = 2-bit error detection has occurred

1 = 2-bit error detection has not occurred

Dependency: N/A

INSV[0]

ECC1BT

ECC 1-bit Error

Detection and

Correction

V -> R/W

Description: The ECC1BT bit indicates whether a 1-bit ECC

correction error has caused a transition on INT#.

Selection Options:

0 = 1-bit error correction has occurred

1 = 1-bit error correction has not occurred

Dependency: N/A

Table 70

Infineon® Endurance Flex architecture selection register (pointer 4)

Bit

number

Name

Function

Read/Write

N = Nonvolatile

V = Volatile

Factory default

(binary)

Description

EFX4O[10:2] EPTAD4[8:0]

Endurance Flex

Pointer 4 Address

Selection

N -> R/1

111111111

Description: The EPTAD4[8:0] bits define the 9-bit address of

the beginning sector from where the long retention / high

endurance region is defined.

Selection Options: Pointer Address

Dependency: N/A

EFX4O[1]

ERGNT4

Endurance Flex

Pointer 4 based

Region Type

Selection

N -> R/1

Description: The ERGNT4 bit defines whether the region is long

retention or high endurance.

Selection Options:

0 = Long Retention Sectors

1 = High Endurance Sectors

Dependency: N/A

EFX4O[0]

EPTEB4

Endurance Flex

Pointer 4 Enable#

Selection

N -> R/1

Description: The EPTEN4 bit define whether the wear leveling

pointer is enabled/disabled.

Selection Options:

0 = Pointer Address Enabled

1 = Pointer Address Disabled

Dependency: N/A

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