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28HS01GTAM03 Datenblatt(PDF) 65 Page - Infineon Technologies AG |
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28HS01GTAM03 Datenblatt(HTML) 65 Page - Infineon Technologies AG |
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65 / 138 page ![]() Datasheet 65 of 138 002-18216 Rev. *W 2022-01-18 256Mb/512Mb/1Gb SEMPER™ Flash Octal interface, 1.8V/3.0V Features 4.12.1.3 Data integrity check suspend • Data Integrity Check Suspend is valid only during a Data Integrity Check Calculation operation. • The Memory Array Data Integrity CRC Suspend Status Flag (DICRCS) in Status Register-2 (STR2V[4]) can be used to determine if a data integrity check operation has been suspended or was completed at the time RDYBSY changes to 0. • A data integrity check operation can be suspended to allow a read operation. The Write Any Register or Erase Persistent Protection Bit transactions are not allowed during Erase, Program or Data Integrity Check Suspend. It is therefore, not possible to alter the Block Protection or PPB bits during Erase Suspend. If there are sectors that may need programming during Erase suspend, these sectors should be protected only by DYB bits that can be turned OFF during Erase Suspend. The time required for the suspend operation to complete is tPEDS. After an erase-suspended program operation is complete, the device returns to the erase-suspend mode. The system can determine the status of the program operation by reading the RDYBSY bit in the Status Register 1, just as in the standard program operation. Table 35 lists the transactions allowed during the suspend operation. Table 35 Transactions allowed during suspend Transaction name Allowed during erase suspend Allowed during program suspend Allowed during data integrity check suspend Write Disable (WRDIS_0_0) Yes No No Read Status Register 1 (RDSR1_0_0, RDSR1_4_0) Yes Yes Write Enable (WRENB_0_0) No No Read Status Register 2 (RDSR2_0_0, RDSR2_4_0) Yes Yes Program Page (PRPGE_4_1) No No Read ECC Status (RDECC_4_0) Yes Yes Clear ECC Status Register (CLECC_0_0) Yes Read PPB Lock Bit (RDPLB_0_0, RDPLB_4_0) Resume Program / Erase / Data Integrity Check (RSEPD_0_0) Program SSR (PRSSR_4_1) No No Read SSR (RDSSR_4_0) Yes Yes Read Unique ID (RDUID_0_0, RDUID_4_0) Read SFDP (RSFDP_3_0, RSFDP_4_0) Read Interface CRC Register (RDCRC_4_0) Read Any Register (RDARG_C_0, RDARG_4_0) Software Reset Enable (SRSTE_0_0) Clear Program and Erase Failure Flags (CLPEF_0_0) Software Reset (SFRST_0_0) Read Identification Register (RDIDIN_0_0, RDIDIN_4_0) (manufacturer and device identification) Suspend Program / Erase / Data Integrity Check (SPEPD_0_0) No No Read DYB (RDDYB_4_0) Yes Yes Read PPB (RDPPB_4_0) Read Octal SDR (RDAY1_4_0) Read Octal DDR (RDAY2_4_0) |
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