28HS01GTAM03 datasheet(78/138 Pages) INFINEON

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Datasheet

78 of 138

002-18216 Rev. *W

2022-01-18

256Mb/512Mb/1Gb SEMPER™ Flash

Octal interface, 1.8V/3.0V

Registers

5.3

Status register 2 (STR2x)

Status Register 2 provides device status on operations. The functionality of supported Status Register 2 type is

described in Table 44.

Table 44

Status register 2[23]

Bit

number

Name

Function

Read/Write

N = Nonvolatile

V = Volatile

Factory default

(binary)

Description

STR2V[7:5] RESRVD Reserved for Future Use

V -> R

This bit is Reserved for future use. This bit must always be

written/loaded to its default state.

STR2V[4]

DICRCS

Memory Array Data Integrity

Cyclic Redundancy Check

Suspend Status Flag

V -> R

Description: The DICRCS bit is used to determine when the

device is in Memory Array Data Integrity Cyclic Redundancy

Check suspend mode.

Selection Options:

0 = Memory Array Data Integrity Cyclic Redundancy Check is

not in suspend mode

1 = Memory Array Data Integrity Cyclic Redundancy Check is

in suspend mode

Dependency: N/A

STR2V[3]

DICRCA

Memory Array Data Integrity

Cyclic Redundancy Check

Abort Status Flag

V -> R

Description: The DICRCA bit indicates that the Memory Array

Data Integrity CRC calculation operation was aborted. The

abort condition is based on ending address (ENDADD) and

starting address (STRADD) relationship. If ENDADD <

STRADD + 3, then DICRCA will be set and the device will

return to the Standby state. DICRCA flag gets cleared at the

next Data Integrity CRC calculation operation when ENDADD

≥

STRADD + 3.

Selection Options:

0 = Memory Array Data Integrity CRC calculation Is not

aborted

1 = Memory Array Data Integrity CRC calculation is aborted

Dependency: N/A

STR2V[2]

SESTAT Sector Erase Success/Failure

Status Flag

V -> R

Description: The SESTAT bit indicates whether the erase

operation on the sector completed successfully. Evaluate

Erase Status transaction (EVERS_4_0) must be executed

prior to reading SESTAT bit which specifies the sector

address.

Selection Options:

1 = Addressed sector (EVERS_4_0) was erased successfully

0 = Addressed sector (EVERS_4_0) was not erased success-

fully

Dependency: N/A

STR2V[1]

ERASES Erase operation Suspend

Status Flag

V -> R

Description: The ERASES bit is used to indicate if the Erase

operation is suspended.

Selection Options:

0 = Erase operation is not in suspend mode

1 = Erase operation is in suspend mode

Dependency: N/A

STR2V[0]

PROGMS Program operation Suspend

Status Flag

V -> R

Description: The PROGMS bit is used to indicate if the

Program operation is suspended.

Selection Options:

0 = Program operation is not in suspend mode

1 = Program operation is in suspend mode

Dependency: N/A

Note

23. STR2x value during POR, Hardware Reset, Software Reset, DPD Exit, and CS# Signaling Reset is not valid. STR2x bits are valid only when STR1V[0] /

RDYBSY = 0.

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