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28HS01GTAM03 Datenblatt(PDF) 53 Page - Infineon Technologies AG |
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28HS01GTAM03 Datenblatt(HTML) 53 Page - Infineon Technologies AG |
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53 / 138 page ![]() Datasheet 53 of 138 002-18216 Rev. *W 2022-01-18 256Mb/512Mb/1Gb SEMPER™ Flash Octal interface, 1.8V/3.0V Features 4.6.2.1 Host polling behavior The host will need to go through a Status Register polling sequence to determine if a Configuration corruption has occurred in the device. The flowchart for the sequence is shown in Figure 53. Figure 53 Host polling sequence for configuration corruption detection Note The polling sequence must start from a higher I/O interface configuration to a lower I/O interface configu- ration. As an example, 8D-8D-8D to 1S-1S-1S. Not the other way around. 4.6.2.2 Configuration corruption detection related registers Table 27 Configuration corruption detection related registers and transactions Related registers Related SPI transactions (see Table 75 on page 95) Related octal transactions (see Table 78 on page 99) Status Register 1 Volatile (STR1V) (see Table 41 on page 76) All 1S-1S-1S Transactions N/A Notes 20. If you have Vcc within specifications and a hardware reset does not resolve the issue, replace the flash device. 21. As soon as first Write Any Register transaction updates the Nonvolatile Status Register or Configuration Register, all remaining nonvolatile status and configuration registers go back to the predefined state (STR1N = 0x00, CFR1N = 0x00, CFR2N = 0x00, CFR3N = 0x00, CFR4N = 0x00, CFR5N = 0x40). It is recommended to initiate SafeBoot recovery operation by configuring the Address byte length and latency followed by rest configurations. Power-Up Read Status Register 1 (Current Communication Protocol) Status Register 1 = 0x00? & Any Read Identification Transaction = Successful Device Ready Yes Change Host Interface to SDR SPI (1S-1S-1S) No Read Status Register 1 Hardware Reset Clear Status Register 1 Device Ready Change Host Interface to Default Flash Configuration Corruption Detected Flash Microcontroller Initialization Failure Detected Status Register 1 = 0x41 Status Register 1 = 0x61 Configure the Device by Updating All Nonvolatile Registers Power-Up Read Status Register 1 (Current Communication Protocol) Status Register 1 = 0x00? & Any Read Identification Transaction = Successful Device Ready Yes Change Host Interface to SDR SPI (1S-1S-1S) No Read Status Register 1 Hardware Reset Clear Status Register 1 Device Ready Change Host Interface to Default Flash Configuration Corruption Detected Flash Microcontroller Initialization Failure Detected Status Register 1 = 0x41 Status Register 1 = 0x61 Configure the Device by Updating All Nonvolatile Registers [20] [21] |
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