28HS01GTAM03 datasheet(96/138 Pages) INFINEON

96 / 138 page

Read flash

array

RDAY1_C_0

Read transaction reads out the memory

contents at the given address. The

maximum CK frequency for this transaction

is 50MHz frequency.

(CMD)

ADDR

[23:16]

ADDR

[15:8]

ADDR

[7:0]

---

Figure 13

ADDR

[31:24]

ADDR

[23:16]

ADDR

[15:8]

ADDR

[7:0]

RDAY1_4_0

(CMD)

ADDR

[31:24]

ADDR

[23:16]

ADDR

[15:8]

ADDR

[7:0]

RDAY2_C_0

Read Fast transaction reads out the

memory contents at the given address. The

maximum CK frequency for this transaction

is 166MHz frequency.

(CMD)

ADDR

[23:16]

ADDR

[15:8]

ADDR

[7:0]

---

Figure 12

166

ADDR

[31:24]

ADDR

[23:16]

ADDR

[15:8]

ADDR

[7:0]

Program

flash array

PRPGE_4_1

Program Page programs 256B or 512B data

to the memory array in one transaction.

WRENB_0_0

(CMD)

ADDR

[31:24]

ADDR

[23:16]

ADDR

[15:8]

ADDR

[7:0]

Input

Data 1

[7:0]

Input

Data 2

[7:0]

(Continu

Figure 9

Erase flash

array

ER004_4_0

Erase 4-KB Sector transaction sets all the

bits of a 4KB sector to 1 (all bytes are FFh).

WRENB_0_0

(CMD)

ADDR

[31:24]

ADDR

[23:16]

ADDR

[15:8]

ADDR

[7:0]

Figure 7

ER256_4_0

Erase 256-KB Sector transaction sets all the

bits of a 256KB sector to 1 (all bytes are FFh).

WRENB_0_0

(CMD)

ADDR

[31:24]

ADDR

[23:16]

ADDR

[15:8]

ADDR

[7:0]

ERCHP_0_0

Erase Chip transaction sets all bits to 1 (all

bytes are FFh) inside the entire flash

memory array.

WRENB_0_0

60orC7

(CMD)

Figure 6

N/A

EVERS_4_0

Evaluate Erase Status transaction verifies

that the last erase operation on the

addressed sector was completed success-

fully.

(CMD)

ADDR

[31:24]

ADDR

[23:16]

ADDR

[15:8]

ADDR

[7:0]

Figure 7

SEERC_4_0

Sector Erase Count transaction outputs the

number of erase cycles for the sector of the

inputed address from the Sector Erase

Count Register.

(CMD)

ADDR

[31:24]

ADDR

[23:16]

ADDR

[15:8]

ADDR

[7:0]

Figure 12

Suspend /

resume

SPEPD_0_0

Suspend Erase / Program / Data Integrity

Check transaction allows the system to

interrupt a programming, erase or data

integrity check operation.

(CMD)

Figure 6

N/A

RSEPD_0_0

Resume Erase / Program / Data Integrity

Check transaction allows the system to

resume a programming, erase or data

integrity check operation.

(CMD)

Secure

silicon

region

PRSSR_4_1

Program Secure Silicon Region trans-

action programs data in 1024 bytes of

Secure Silicon Region.

WRENB_0_0

(CMD)

ADDR

[31:24]

ADDR

[23:16]

ADDR

[15:8]

ADDR

[7:0]

Input

Data 1

[7:0]

Input

Data 2

[7:0]

(Continu

Figure 9

RDSSR_4_0

Read Secure Silicon Region transaction

reads data from the SSR.

(CMD)

ADDR

[31:24]

ADDR

[23:16]

ADDR

[15:8]

ADDR

[7:0]

Figure 12

Table 75

SPI (1S-1S-1S) transaction table (Continued)

Function

Transaction

name

Description

Prerequisite

transaction

Byte 1

(Hex)

Byte 2

(Hex)

Byte 3

(Hex)

Byte 4

(Hex)

Byte 5

(Hex)

Byte 6

(Hex)

Byte 7

(Hex)

Byte 8

(Hex)

Byte 9

(Hex)

Transaction

format

Max

frequency

(MHz)

Address

length

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