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28HS01GTAM03 Datenblatt(PDF) 90 Page - Infineon Technologies AG

Teilenummer 28HS01GTAM03
Bauteilbeschribung  S256Mb/512Mb/1Gb SEMPER??Flash Octal interface, 1.8V/3.0V
PDF  138 Pages
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Hersteller  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

28HS01GTAM03 Datenblatt(HTML) 90 Page - Infineon Technologies AG

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002-18216 Rev. *W
2022-01-18
256Mb/512Mb/1Gb SEMPER™ Flash
Octal interface, 1.8V/3.0V
Registers
5.19
ASP dynamic block access register (DYAV)
The ASP DYB Access Register (DYAV) is used to provide the state of each sector's DYB protection bit.
5.20
AutoBoot register (ATBN)
The AutoBoot Register (ATBN) provides a means to automatically read boot code as part of the power-on reset,
or hardware reset process.
5.21
Sector erase count register (SECV)
The Sector Erase Count Register (SECV) contains the number of times the addressed sector has been erased.
Table 65
ASP DYB access register
Bit
number
Name
Function
Read/Write
N = Nonvolatile
V = Volatile
Factory default
(binary)
Description
DYAV[7:0]
DYBACS[7:0]
Sector Based DYB
Protection Status
V -> R/W
11111111
Description: The DYBACS[7:0] bits are used to provide the state
of the individual sector's DYB bit.
Selection Options:
FF = DYB for the sector addressed by the Read DYB transaction
(RDDYB_4_0) is 1, not protecting that sector from program or
erase operations
00 = DYB for the sector addressed by the Read DYB transaction
(RDDYB_4_0) is 0, protecting that sector from program or erase
operations
Dependency: N/A
Table 66
AutoBoot register
Bit
number
Name
Function
Read/Write
N = Nonvolatile
V = Volatile
Factory default
(binary)
Description
ATBN[31:9] STADR[22:0]
Starting Address
Selection where
AutoBoot will start
reading data from
N -> R/W
00000000000000
000000000
Description: The STADR[22:0] bits set the starting address from
which the device will output the read data.
Selection Options: Address Bits
Dependency: N/A
ATBN[8:1]
STDLY[7:0]
AutoBoot Read
Starting Delay
Selection
N -> R/W
00000000
Description: The STDLY[7:0] bits specify the initial delay (clock
cycles) needed by the host before it can accept data.
Note STDLY[7:0]=0x00 is valid for SPI up to 50MHz. STDLY[7:0]
= 0x01 or higher is valid for SPI up to 166MHz. STDLY[7:0] = 0x05
or higher is valid for HL-T Octal up to 166MHz and HS-T Octal
up to 200MHz.
Selection Options: Address Bits
Dependency: N/A
ATBN[0]
ATBTEN
AutoBoot Feature
Selection
N -> R/W
0
Description: The ATBTEN bit enables or disables the AutoBoot
feature.
Selection Options:
0 = AutoBoot feature disabled
1 = AutoBoot feature enabled
Dependency: N/A
Table 67
Sector erase count register
Bit
number
Name
Function
Read/Write
N = Nonvolatile
V = Volatile
Factory default
(binary)
Description
SECV[23]
SECCPT
Sector Erase Count
Corruption Status Flag
V -> R
0x0
Description: The SECCPT bit is used to determine if the
reported sector erase count is corrupted and was reset.
Note If SECCPT is set due to count corruption, it will reset
to 0 on the next successful erase operation on the selected
sector.
Selection Options:
0 = Sector Erase Count is not corrupted and is valid
1 = Sector Erase Count is corrupted and is not valid
Dependency: N/A



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