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28HS01GTAM03 Datenblatt(PDF) 98 Page - Infineon Technologies AG |
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28HS01GTAM03 Datenblatt(HTML) 98 Page - Infineon Technologies AG |
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98 / 138 page ![]() 6.2 SPI (1S-1S-8S) transaction table (HL256T and HS256T only) 6.3 SPI (1S-8S-8S) transaction table (HL256T and HS256T only) Table 76 SPI (1S-1S-8S) transaction table Function Transaction name Description Prerequisite transaction Byte1 (Hex) Byte 2 (Hex) Byte 3 (Hex) Byte 4 (Hex) Byte 5 (Hex) Byte6 (Hex) Byte7 (Hex) Byte8 (Hex) Byte 9 (Hex) Transaction format Max frequency (MHz) Address length Read flash array RDAY3_4_0 Read transaction reads out the memory contents at the given address with Octal Data output. The maximum CK frequency for this transaction is 166MHz frequency. - 7C (CMD) ADDR [31:24] ADDR [23:16] ADDR [15:8] ADDR [7:0] --- - Figure 15 166 4 Program flash array PRPG1_C_1 Program Page programs 256B or 512B data to the memory array in one transaction with Octal Data input. WRENB_0_0 82 (CMD) ADDR [23:16] ADDR [15:8] ADDR [7:0] Input Data 1 [7:0] Input Data2 [7:0] Input Data 3[7:0] (Conti nue) - Figure 16 ADDR [31:24] ADDR [23:16] ADDR [15:8] ADDR [7:0] Input Data1 [7:0] Input Data2 [7:0] (Conti nue) - PRPG1_4_1 Program Page programs 256B or 512B data to the memory array in one transaction with Octal Data input. 84 (CMD) ADDR [31:24] ADDR [23:16] ADDR [15:8] ADDR [7:0] Input Data1 [7:0] Input Data2 [7:0] (Conti nue) - Table 77 SPI (1S-8S-8S) transaction table Function Transaction name Description Prerequisite transaction Byte1 (Hex) Byte 2 (Hex) Byte 3 (Hex) Byte 4 (Hex) Byte 5 (Hex) Byte6 (Hex) Byte7 (Hex) Byte8 (Hex) Byte 9 (Hex) Transaction format Max frequency (MHz) Address length Program flash array PRPG2_4_1 Program Page programs 256B or 512B data to the memory array in one transaction with Octal Address and Data input. WRENB_0_0 8E (CMD) ADDR [31:24] ADDR [23:16] ADDR [15:8] ADDR [7:0] Input Data1 [7:0] Input Data2 [7:0] (Conti nue) - Figure 17 166 4 PRPG3_C_1 C2 (CMD) ADDR [23:16] ADDR [15:8] ADDR [7:0] Input Data 1 [7:0] Input Data2 [7:0] Input Data 3[7:0] (Conti nue) -3 ADDR [31:24] ADDR [23:16] ADDR [15:8] ADDR [7:0] Input Data1 [7:0] Input Data2 [7:0] (Conti nue) -4 |
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