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28HS01GTAM03 Datenblatt(PDF) 37 Page - Infineon Technologies AG |
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28HS01GTAM03 Datenblatt(HTML) 37 Page - Infineon Technologies AG |
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37 / 138 page ![]() Datasheet 37 of 138 002-18216 Rev. *W 2022-01-18 256Mb/512Mb/1Gb SEMPER™ Flash Octal interface, 1.8V/3.0V Features Notes • If a transaction is aborted before the command is legally received, i.e. the transfer length is cut short by CS# de-asserting early - the transferred data will still be clocked into the CRC check-value, but it is no longer guaranteed. When using Interface CRC, only valid, non-aborted transactions must be used. • It is required to read Interface CRC value before any Volatile Status Register read and Clear Interface CRC value after any Volatile Status Register read(s). • When Interface CRC is disabled, the interface CRC register value becomes indeterminate. It is recommended to read the interface CRC register before disabling the interface CRC feature, and again after enabling the interface CRC feature to re-initialize the CRC calculation. 4.3.1 Read The read operation is performed when the host specifies the READ transaction while CS# is LOW. The device then provides the data from the memory based on the address. Any number of bytes can be read (burst reads) to consecutive addresses without issuing a new READ transaction. For transaction protection, the device performs the CRC over the entire transaction sequence (CS# LOW state) using the CRC32 polynomial. Once the CS# is brought HIGH, the CRC calculation is stopped and the check-value latched into the CRC Register. If multiple READ transactions are executed by the host, the device continues updating the CRC check-value between every CS# LOW cycle. Figure 39 Read CRC Protection Note Back to back Interface CRC read transaction will not show the CRC checksum value being reset. At the end of each read interface CRC register transaction, the interface CRC register will get reset and updates itself with new CRC checksum value after getting a transaction with valid input data for at least three clock cycles. CK CS# Command (16 Bits) Address (32 Bits) Read Data (n Bits) DQ[7:0] Read Transaction CRC32 - Equation CRC Read Every 32-bits of data is shifted into CRC32 and the Checksum is updated CK CS# Command (16 Bits) Address (32 Bits) Read Data (n Bits) DQ[7:0] Read Transaction CRC32 - Equation CRC Read Every 32-bits of data is shifted into CRC32 and the Checksum is updated |
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