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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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28HS01GTAM03 Datenblatt(PDF) 1 Page - Infineon Technologies AG |
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28HS01GTAM03 Datenblatt(HTML) 1 Page - Infineon Technologies AG |
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1 / 138 page  Datasheet Please read the Important Notice and Warnings at the end of this document 002-18216 Rev. *W www.infineon.com page 1 of 138 2022-01-18 S28HS256T, S28HS512T, S28HS01GT, S28HL256T, S28HL512T, S28HL01GT S 256Mb/512Mb/1Gb SEMPER™ Flash Octal interface, 1.8V/3.0V Features • CYPRESS™ 45-nm MIRRORBIT™ technology that stores two data bits in each memory array cell • Sector architecture options - Uniform: Address space consists of all 256KB sectors -Hybrid: • Configuration 1 - Address space consists of thirty-two 4KB sectors grouped either on the top or the bottom while the remaining sectors are all 256KB • Configuration 2 - Address space consists of thirty-two 4KB sectors equally split between top and bottom while the remaining sectors are all 256KB • Page programming buffer of 256 or 512 bytes • OTP secure silicon array of 1024 bytes (32 32 bytes) • Octal interface (8S-8S-8S, 8D-8D-8D) - JEDEC eXpanded serial peripheral interface (SPI) (JESD251) compliant - SDR option runs up to 200-MBps (200MHz clock speed) - DDR option runs up to 400-MBps (200MHz clock speed) - Supports Data Strobe (DS) to simplify the read data capture in high-speed systems •SPI (1S-1S-1S) - JEDEC eXpanded SPI (JESD251) compliant - SDR option runs up to 21-MBps (166MHz clock speed) • Functional safety features - Functional safety ISO26262 ASIL B compliant and ASIL D ready - Infineon® Endurance Flex architecture provides High-Endurance and Long Retention Partitions - Interface CRC detects errors on communication interface between host controller and SEMPER™ Flash device - Data integrity CRC detects errors in memory array - SafeBoot reports device initialization failures, detects configuration corruption and provides recovery options - Built-in Error Correcting Code (ECC) corrects Single-bit Error and detects Double-bit Error (SECDED) on mem- ory array data - Sector erase status indicator for power loss during erase •Protection features - Legacy block protection (LBP) for memory array and device configuration - Advanced sector protection (ASP) for individual memory array sector based protection • AutoBoot enables immediate access to the memory array following power-on • Hardware reset through CS# Signaling method (JEDEC) OR individual RESET# pin • Serial flash discoverable parameters (SFDP) describing device functions and features • Device identification, manufacturer identification and unique identification • Data integrity - 256Mb devices • Min. 640,000 program-erase cycles for the main array - 512Mb devices • Min. 1,280,000 program-erase cycles for the main array |
Ähnliche Teilenummer - 28HS01GTAM03 |
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Ähnliche Beschreibung - 28HS01GTAM03 |
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