28HS01GTAM03 datasheet(29/138 Pages) INFINEON

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Datasheet

29 of 138

002-18216 Rev. *W

2022-01-18

256Mb/512Mb/1Gb SEMPER™ Flash

Octal interface, 1.8V/3.0V

Features

4.1.1

ECC error reporting

There are five methods for reporting to the host system when ECC errors are detected.

• ECC Data Unit Status provides the status of 1-bit or 2-bit errors in data units.

• ECC Status Register provides the status of 1-bit or 2-bit errors since the last ECC clear or reset.

• The Address Trap Register captures the address location of the first ECC error encountered after POR or reset

during memory array read.

• An ECC Error Detection counter keeps a tally of the number of 1-bit or 2-bit errors that have occurred in data

units during reads.

• The Interrupt (INT#)output canbe enabled toindicatewheneither a 1-bitor 2-biterror isdetected asdatais read.

4.1.1.1

ECC data unit status (EDUS)

• The status of ECC in each data unit is provided by the 8-bit ECC Data Unit Status.

• The ECC status transaction outputs the ECC status of the addressed data unit. The contents of the ECC Data

Unit status then indicate, for the selected data unit, whether there is a 1-bit error corrected, 2-bit error detected,

or the ECC is disabled for that data unit.

Table 9

ECC data unit status

Bits

Fieldname

Function

Read/Write

N = Nonvolatile

V = Volatile

Factorydefault

(binary)

Description

EDUS[7:4]

RESRVD

Reserved For Future

Use

V => R

0000

These bits are Reserved for future use.

EDUS[3]

ECC2BD

ECC Error 2-bit Error

Detection Flag

V => R

This bit indicates whether a two bit error is detected in the data unit,

if two bit ECC error detection is enabled CFR4V[3] = 1.

When CFR4V[3] = 0 and 2-bit error detection is disabled, ECC2BD bit

will always be ‘0’.

Note: If 2 bit error detection is enabled (CFR4V[3] = 1), the ECCOFF

bit will not be set to 1b while performing single byte programming

or bit walking in a data unit that was already partially programmed.

An attempt to do such byte programming or bit walking will result

in a Program Error.

Selection Options:

1 = Two Bit Error detected

0 = No error

EDUS[2]

RESRVD

Reserved For Future

Use

V => R

This bit is Reserved for future use.

EDUS[1]

ECC1BC

ECC Error 1-bit Error

Detection and

Correction Flag

V => R

This bit indicates whether an error was corrected in the data unit.

Selection Options:

1 = Single Bit Error corrected in the addressed data unit

0 = No single bit error was corrected in the addressed data unit

EDUS[0]

ECCOFF

Data Unit ECC

Off/On Flag

V => R

This bit indicates whether the ECC syndrome is off in the data unit.

Selection Options:

1 = ECC is OFFin the selected data unit

0 = ECC is ON in the selected data unit

Dependency: CFR4x[3]

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