FS26 datasheet(21/156 Pages) NXP

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NXP Semiconductors

FS26

Safety system basis chip with low power for ASIL D/ASIL B

13 Supply voltage and operating range

13.1 Supply voltage

Depending on the chosen front-end voltage regulator (VPRE or VBST), the FS26 can support two different

supply voltage ranges.

If VBST is chosen to be the front-end DCDC converter (directly connected to the battery), the supply voltage of

the FS26 can go down to voltage levels typical of a cold-crank event. Because of this, the FS26 can still provide

all available regulated voltages, even when the battery line drops below the VPRE output voltage. In this case,

the supply voltage operating range is extended to VBST_IN range.

When VPRE is chosen to be the first DCDC converter connected to the battery, the FS26 is unable to provide

power rails when the supply voltage is below the VPRE_IN minimum limit. This topology can be used in

applications where VSUP_PWR > VPRE_PWM + VPRE_HDR, avoiding degraded operation (drop-out mode). Note that

there is a drop between VBAT and VSUP. VSUP_UVTH_OTP = 1 is then mandatory.

If an application requires voltages above the VPRE output voltage, the boost controller can be used to generate

these voltages. In this case, the supply voltage operating range is narrowed down to the VPRE_IN voltage range.

The VSUP pin voltage VSUP is monitored to avoid erratic startup and shutdown of the FS26. Specific voltage

thresholds are implemented with hysteresis. When VSUP is rising, the FS26 does not start until the VSUP crosses

the VSUP_UVH threshold. If VSUP goes below VSUP_UVL before the end of the power-up sequence, the device will

restart. Once the power-up sequence is finished and the device is in normal mode, VSUP_UVL has no effect.

The VSUPUV6_I SPI bit can notify the system that the input voltage of the FS26 is decreasing, indicating that

VSUP has crossed the VSUP_UV6 voltage threshold.

TA = –40 °C to 125 °C, unless otherwise specified. VSUP_UVH < VSUP < 36 V, VPRE_PWM + VPRE_HDR < VSUP_PWR < 36 V, unless otherwise

specified. All voltages are referenced to ground.

Symbol

Description

Min

Typ

Max

Unit

VSUP

Device input supply voltage (on VSUP pin)

VSUP_UVL

VSUP_PWR Device input supply voltage (on VSUP_PWR pin)

VPRE_IN

VSUP_OV

Threshold voltage to latch the interrupt VSUPOV_I (on VSUP pin)

19.3

20.7

VSUP_UV6

Threshold voltage to latch the interrupt VSUPUV6_I (on VSUP pin)

5.8

6.0

6.2

VSUP undervoltage threshold (rising edge on VSUP pin)

VSUP_UVH

VSUP_UVTH_OTP = 0 (recommended for VBST in front-end configuration)

VSUP_UVTH_OTP = 1 (mandatory for VBST in back-end configuration or not used)

4.6

5.95

4.8

6.1

5.0

6.25

VSUP undervoltage threshold (falling edge on VSUP pin)

VSUP_UVL

VSUP_UVTH_OTP = 0 (recommended for VBST in front-end configuration)

VSUP_UVTH_OTP = 1 (mandatory for VBST in back-end configuration or not used)

4.1

5.5

4.3

5.65

4.5

5.8

VPRE_UVH

VPRE undervoltage threshold high (rising edge on VPRE pin)

2.9

3.0

3.1

VPRE_UVL

VPRE undervoltage threshold low (falling edge on VPRE pin)

2.5

2.6

2.7

VPRE_

UVBOS

VPRE undervoltage threshold to switch VBOS from VPRE to VSUP when BOS_IN_

OTP[1:0] = 0

3.4

3.55

3.7

Table 8. Electrical characteristics

FS26_SDS

All information provided in this document is subject to legal disclaimers.

Product short data sheet

Rev. 6.0 — 12 December 2025

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