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FS26 Datenblatt(PDF) 80 Page - NXP Semiconductors

Teilenummer FS26
Bauteilbeschribung  Safety system basis chip with low power for ASIL D/ASIL B
PDF  156 Pages
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FS26 Datenblatt(HTML) 80 Page - NXP Semiconductors

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NXP Semiconductors
FS26
Safety system basis chip with low power for ASIL D/ASIL B
Bit
Bit Group Name
Description
Value
Settings
1h
Slot 1
2h
Slot 2
3h
Slot 3
4h
Slot 4
5h
Slot 5
6h
Slot 6
7h
Slot 7 / OFF
Table 87. OTP_CORE_CFG5 register bit description...continued
Go to main OTP configuration map
17.2.20 OTP_LDO1_CFG
Bit
Bit Group Name
Description
Value
Settings
0h
pull-down enabled in TSD
7
LDO1TSD_PD_OTP
LDO1 TSD pull-down
1h
pull-down disabled in TSD
0h
LDO1 disabled only
6
LDO1TDFS_OTP
LDO1 TSD behavior
Default value of LDO1TDFS
1h
Go to DFS
0h
Disabled
5
LDO1_LP_EN_OTP
LDO1 in standby mode
1h
Enabled
0h
3.3 V
4
VLDO1_LP_OTP
LDO1 voltage in standby mode
1h
5.0 V
0h
3.3 V
3
VLDO1_OTP
LDO1 voltage in normal mode
VLDOx
1h
5.0 V
0h
Slot 0
1h
Slot 1
2h
Slot 2
3h
Slot 3
4h
Slot 4
5h
Slot 5
6h
Slot 6
2 to 0
LDO1_SLOT_OTP[2:0]
LDO1 power-up slot
7h
Slot 7 / OFF
Table 88. OTP_LDO1_CFG register bit description
Go to main OTP configuration map
17.2.21 OTP_LDO2_CFG
Bit
Bit Group Name
Description
Value
Settings
0h
pull-down enabled in TSD
7
LDO2TSD_PD_OTP
LDO2 TSD pull-down
1h
pull-down disabled in TSD
0h
LDO2 disabled only
6
LDO2TDFS_OTP
LDO2 TSD behavior
Default value of LDO2TDFS
1h
Go to DFS
0h
Disabled
5
LDO2_LP_EN_OTP
LDO2 in standby mode
1h
Enabled
0h
3.3 V
4
VLDO2_LP_OTP
LDO2 voltage in standby mode
1h
5.0 V
Table 89. OTP_LDO2_CFG register bit description
FS26_SDS
All information provided in this document is subject to legal disclaimers.
© 2025 NXP B.V. All rights reserved.
Product short data sheet
Rev. 6.0 — 12 December 2025
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