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FS26 Datenblatt(PDF) 57 Page - NXP Semiconductors

Teilenummer FS26
Bauteilbeschribung  Safety system basis chip with low power for ASIL D/ASIL B
PDF  156 Pages
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FS26 Datenblatt(HTML) 57 Page - NXP Semiconductors

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NXP Semiconductors
FS26
Safety system basis chip with low power for ASIL D/ASIL B
16.2.15 M_TSD_CFG
Bit
15
14
13
12
11
10
9
8
Write
0
0
0
0
0
0
0
0
Read
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
Reset
0
0
0
0
0
0
0
0
Table 44. M_TSD_CFG register bit allocation
Bit
7
6
5
4
3
2
1
0
Write
0
0
VPRETDFS
TRK2TDFS
TRK1TDFS
CORETDFS
LDO2TDFS
LDO1TDFS
Read
RESERVED
RESERVED
VPRETDFS
TRK2TDFS
TRK1TDFS
CORETDFS
LDO2TDFS
LDO1TDFS
Reset
0
0
OTP
OTP
OTP
OTP
OTP
OTP
Go to main register map
Bit
Symbol
Value
Description
Deep Fail Safe request in case of VPRE Thermal Shutdown
0h
Regulator disabled
1h
Transition to DFS
5
VPRETDFS
Load fuse state (VPRETDFS_OTP)
Deep Fail Safe request in case of TRK2 Thermal Shutdown
0h
Regulator disabled
1h
Transition to DFS
4
TRK2TDFS
Load fuse state (TRK1TDFS_OTP)
Deep Fail Safe request in case of TRK1 Thermal Shutdown
0h
Regulator disabled
1h
Transition to DFS
3
TRK1TDFS
Load fuse state (TRK1TDFS_OTP)
Deep Fail Safe request in case of VCORE Thermal Shutdown
0h
Regulator disabled
1h
Transition to DFS
2
CORETDFS
Load fuse state (CORETDFS_OTP)
Deep Fail Safe request in case of LDO2 Thermal Shutdown
0h
Regulator disabled
1h
Transition to DFS
1
LDO2TDFS
Load fuse state (LDO1TDFS_OTP)
Deep Fail Safe request in case of LDO1 Thermal Shutdown
0h
Regulator disabled
1h
Transition to DFS
0
LDO1TDFS
Load fuse state (LDO1TDFS_OTP)
Table 45. M_TSD_CFG register bit description
16.2.16 M_REG_CFG
Bit
15
14
13
12
11
10
9
8
Write
0
0
0
0
0
0
0
0
Read
0
0
0
0
0
0
0
0
Reset
0
0
0
0
0
0
0
0
Table 46. M_REG_CFG register bit allocation
FS26_SDS
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© 2025 NXP B.V. All rights reserved.
Product short data sheet
Rev. 6.0 — 12 December 2025
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