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FS26 Datenblatt(PDF) 56 Page - NXP Semiconductors |
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FS26 Datenblatt(HTML) 56 Page - NXP Semiconductors |
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56 / 156 page ![]() NXP Semiconductors FS26 Safety system basis chip with low power for ASIL D/ASIL B Bit 7 6 5 4 3 2 1 0 Write RETRY_CLR 0 0 INTB_TEST INT_PWIDTH FSS_FMOD 0 FSS_EN Read RESERVED RESERVED RESERVED RESERVED INT_PWIDTH FSS_FMOD RESERVED FSS_EN Reset 0 0 0 0 0 0 0 0 Go to main register map Bit Symbol Value Description RETRY_CNT[7:0] indicates the total number of retries attempts (value) RETRY_CNT[7:4] indicates the current duration between two retries (description) 0xh 100 ms (default) 1xh 200 ms 2xh 400 ms 3xh 800 ms 4xh 1600 ms 5xh 3200 ms 6xh 6400 ms 7xh 12800 ms 8xh 25600 ms 9xh 51200 ms Axh 102400 ms Bxh 204800 ms Cxh 409600 ms Dxh 819200 ms Exh 1638400 ms Fxh 3276800 ms 15 to 8 RETRY_CNT[7:0] Reset on power-on reset (POR_M) or RETRY_CLR write 1 Clear retry counter RETRY_CNT[7:0] 0h No effect 1h Clear retry counter 7 RETRY_CLR Reset on power-on reset (POR_M), self-clear Manual test of INTB 0h No effect 1h Enable manual test. Generate a pulse of duration tINTB_PULSE at INTB pin for test purpose. 4 INTB_TEST Reset on power-on reset (POR_M), self-clear INTB pulse duration tINTB_PULSE 0h 25 μs (default) 1h 100 μs 3 INT_PWIDTH Reset on power-on reset (POR_M) Frequency modulation FOSC_MOD during Frequency Spread Spectrum Operation 0h High-frequency oscillator divided by 768 (default) 1h High-frequency oscillator divided by 192 2 FSS_FMOD Reset on power-on reset (POR_M) Frequency Spread Spectrum enable 0h FSS is disabled (default) 1h FSS is enabled 0 FSS_EN Reset on power-on reset (POR_M) Table 43. M_SYS_CFG register bit description FS26_SDS All information provided in this document is subject to legal disclaimers. © 2025 NXP B.V. All rights reserved. Product short data sheet Rev. 6.0 — 12 December 2025 Document feedback 56 / 156 |
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