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FS26 Datenblatt(PDF) 73 Page - NXP Semiconductors |
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FS26 Datenblatt(HTML) 73 Page - NXP Semiconductors |
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73 / 156 page ![]() NXP Semiconductors FS26 Safety system basis chip with low power for ASIL D/ASIL B Bit Bit Group Name Description Value Settings 13h 12.5 V 14h 13.0 V 15h 13.5 V 16h 14.0 V 17h 14.5 V 18h 15.0 V 19h 15.5 V 1Ah 16.0 V 1Bh 16.5 V 1Ch 17.0 V 1Dh 17.5 V 1Eh 18.0 V 1Fh 18.0 V Table 75. OTP_VBST_VOLT register bit description...continued Go to main OTP configuration map 17.2.8 OTP_VPRE_CFG1 Bit Bit Group Name Description Value Settings 0h 0.66 A 1h 0.88 A 2h 1.1 A 3h 1.32 A 4h 1.54 A 5h 1.76 A 6h 1.98 A 7 to 5 VPRE_OC_OTP[2:0] VPRE overcurrent flag IPRE_OC_FLAG 7h 2.2 A 0h 2 ns - Fast mode 4 VPRE_SR_OTP VPRE LX slew rate tPRESW_SLR 1h 4 ns - Slow mode 0h No delay 1h 1 clock cycle 2h 2 clock cycles 3 to 2 VPRE_PH_OTP[1:0] VPRE phase delay 3h 3 clock cycles 0h 269 µs 1h 538 µs 2h 1077 µs 1 to 0 VPRE_SS_OTP[1:0] VPRE soft start tPRE_SS 3h 2150 µs Table 76. OTP_VPRE_CFG1 register bit description Go to main OTP configuration map 17.2.9 OTP_VPRE_CFG2 Bit Bit Group Name Description Value Settings 0h 1300 kΩ 6 to 4 VPRE_RCOMP_OTP[2:0] VPRE comp resistance 1h 1137 kΩ Table 77. OTP_VPRE_CFG2 register bit description FS26_SDS All information provided in this document is subject to legal disclaimers. © 2025 NXP B.V. All rights reserved. Product short data sheet Rev. 6.0 — 12 December 2025 Document feedback 73 / 156 |
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