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FS26 Datenblatt(PDF) 38 Page - NXP Semiconductors

Teilenummer FS26
Bauteilbeschribung  Safety system basis chip with low power for ASIL D/ASIL B
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FS26 Datenblatt(HTML) 38 Page - NXP Semiconductors

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NXP Semiconductors
FS26
Safety system basis chip with low power for ASIL D/ASIL B
Bit
Symbol
Description
Main state machine availability
0
Not available (the main state machine is not in normal mode)
1
Available and able to respond (the main state machine is in normal mode)
31
M_AVAL
Reset on power-on reset (POR_M)
Fail-safe state machine status
0
Fail-safe state machine is not available.
1
Fail-safe state machine is available and able to respond
30
FS_EN
Reset on power-on reset (POR_M)
Event notification from the fail-safe domain
0
No event reported in the fail-safe domain
1
Event reported in the fail-safe domain
Reset on power-on reset (POR_M), cleared when all individual bits are cleared
29
FS_G
Flags Reporting: VPRE_OV, VPRE_UV, CORE_OV, CORE_UV, LDO1_OV, LDO1_UV,
LDO2_OV, LDO2_UV, TRK1_OV, TRK1_UV, TRK2_OV, TRK2_UV, REF_OV, REF_UV,
EXT_OV, EXT_UV,
BAD_WD_DATA, BAD_WD_TIMING, FCCU12, FCCU1, FCCU2, ERRMON, ABIST1_PASS,
ABIST2_PASS, LBIST_STATUS[1:0]
Event notification from the M_COM_FLG
0
No event reported in M_COM_FLG
1
Event reported in the M_COM_FLG
Reset on power-on reset (POR_M), cleared when all individual bits are cleared
Source Register: M_COM_FLG
28
COM_G
Flags Reporting: MSPI_CRC_I, MSPI_CLK_I, MSPI_REQ_I
Event notification from the M_WIO_FLG register
0
No event reported ino M_WIO_FLG register
1
Event reported in the M_WIO_FLG register
Reset on power-on reset (POR_M), cleared when all individual bits are cleared
Source Register: M_WIO_FLG
27
WIO_G
Flags Reporting: WUEVENT[3:0], LDT_I, GPIO2_I, GPIO1_I, WK2_I, WK1_I
Event notification from the M_VSUP_FLG register
0
No event reported in M_VSUP_FLG register
1
Event reported in the M_VSUP_FLG register
Reset on power-on reset (POR_M), cleared when all individual bits are cleared
Source Register: M_VSUP_FLG
26
VSUP_G
Flags Reporting: VBOSUVH_I, VSUPOV_I, VSUPUV6_I, VSUPUVH_I
Event notification from the M_REG_FLG register
25
REG_G
0
No event reported in M_REG_FLG register
Table 12. MISO general device status bit descriptions
FS26_SDS
All information provided in this document is subject to legal disclaimers.
© 2025 NXP B.V. All rights reserved.
Product short data sheet
Rev. 6.0 — 12 December 2025
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