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FS26 Datenblatt(PDF) 81 Page - NXP Semiconductors |
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FS26 Datenblatt(HTML) 81 Page - NXP Semiconductors |
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81 / 156 page ![]() NXP Semiconductors FS26 Safety system basis chip with low power for ASIL D/ASIL B Bit Bit Group Name Description Value Settings 0h 3.3 V 3 VLDO2_OTP LDO2 voltage in normal mode VLDOx 1h 5.0 V 0h Slot 0 1h Slot 1 2h Slot 2 3h Slot 3 4h Slot 4 5h Slot 5 6h Slot 6 2 to 0 LDO2_SLOT_OTP[2:0] LDO2 power-up slot 7h Slot 7 / OFF Table 89. OTP_LDO2_CFG register bit description...continued Go to main OTP configuration map 17.2.22 OTP_TRK1_CFG Bit Bit Group Name Description Value Settings 0h pull-down enabled in TSD 7 TRK1TSD_PD_OTP TRK1 TSD pull-down 1h pull-down disabled in TSD 0h TRK1 disabled only 6 TRK1TDFS_OTP TRK1 TSD behavior Default value of TRK1TDFS 1h Go to DFS 0h VREF 1h Internal LDO Reference 2h LDO2 5 to 4 TRK1_SEL_OTP[1:0] TRK1 input selection 3h VREF 0h Slot 0 1h Slot 1 2h Slot 2 3h Slot 3 4h Slot 4 5h Slot 5 6h Slot 6 2 to 0 TRK1_SLOT_OTP[2:0] TRK1 power-up slot 7h Slot 7 / OFF Table 90. OTP_TRK1_CFG register bit description Go to main OTP configuration map 17.2.23 OTP_TRK2_CFG Bit Bit Group Name Description Value Settings 0h pull-down enabled in TSD 7 TRK2TSD_PD_OTP TRK2 TSD pull-down 1h pull-down disabled in TSD 0h TRK2 disabled only 6 TRK2TDFS_OTP TRK2 TSD behavior Default value of TRK2TDFS 1h Go to DFS 0h VREF 1h Internal LDO reference 5 to 4 TRK2_SEL_OTP[1:0] TRK2 input selection 2h LDO2 Table 91. OTP_TRK2_CFG register bit description FS26_SDS All information provided in this document is subject to legal disclaimers. © 2025 NXP B.V. All rights reserved. Product short data sheet Rev. 6.0 — 12 December 2025 Document feedback 81 / 156 |
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