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FS26 Datenblatt(PDF) 83 Page - NXP Semiconductors |
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FS26 Datenblatt(HTML) 83 Page - NXP Semiconductors |
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83 / 156 page ![]() NXP Semiconductors FS26 Safety system basis chip with low power for ASIL D/ASIL B Bit Bit Group Name Description Value Settings 0h Slot 0 1h Slot 1 2h Slot 2 3h Slot 3 4h Slot 4 5h Slot 5 6h Slot 6 2 to 0 GPIO1_SLOT_OTP[2:0] GPIO1 power-up slot 7h Slot 7 / OFF Table 93. OTP_GPIO1_CFG register bit description...continued Go to main OTP configuration map 17.2.26 OTP_GPIO2_CFG Bit Bit Group Name Description Value Settings 0h Pull-down disabled 6 GPIO2PD_OTP GPIO2 pull-down RPD_GPIOx 1h Pull-down enabled 0h Pull-up disabled 5 GPIO2PU_OTP GPIO2 pull-up RPU_GPIOx 1h Pull-up enabled 0h Input configuration 1h Low-side driver 2h High-side driver 4 to 3 GPIO2STAGE_OTP[1:0] GPIO2 configuration 3h Push-pull driver 0h Slot 0 1h Slot 1 2h Slot 2 3h Slot 3 4h Slot 4 5h Slot 5 6h Slot 6 2 to 0 GPIO2_SLOT_OTP[2:0] GPIO2 power-up slot 7h Slot 7 / OFF Table 94. OTP_GPIO2_CFG register bit description Go to main OTP configuration map 17.2.27 OTP_INPUT_CFG Bit Bit Group Name Description Value Settings 0h 200 kΩ 7 WK2PD_SEL_OTP WAKE2 pull-down value selection RPD_WAKE 1h 10 kΩ 0h 200 kΩ 6 WK1PD_SEL_OTP WAKE1 pull-down value selection RPD_WAKE 1h 10 kΩ 0h Low-voltage threshold 5 GPIO2TH_OTP GPIO2 detection threshold VIL_GPIOx / VIH_GPIOx 1h High-voltage threshold 0h Low-voltage threshold 4 GPIO1TH_OTP GPIO1 detection threshold VIL_GPIOx / VIH_GPIOx 1h High-voltage threshold Table 95. OTP_INPUT_CFG register bit description FS26_SDS All information provided in this document is subject to legal disclaimers. © 2025 NXP B.V. All rights reserved. Product short data sheet Rev. 6.0 — 12 December 2025 Document feedback 83 / 156 |
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