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FS26 Datenblatt(PDF) 46 Page - NXP Semiconductors

Teilenummer FS26
Bauteilbeschribung  Safety system basis chip with low power for ASIL D/ASIL B
PDF  156 Pages
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FS26 Datenblatt(HTML) 46 Page - NXP Semiconductors

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NXP Semiconductors
FS26
Safety system basis chip with low power for ASIL D/ASIL B
Bit
Symbol
Value
Description
0h
VREF is disabled
1h
VREF is enabled
Real-time information
Real time status of VBST regulator
0h
VBST is disabled
1h
VBST is enabled
6
VBST_S
Real-time information
Real time status of VPRE regulator
0h
VPRE is disabled
1h
VPRE is enabled
5
VPRE_S
Real-time information
Real time status of TRK2 regulator
0h
TRK2 is disabled
1h
TRK2 is enabled
4
TRK2_S
Real-time information
Real time status of TRK1 regulator
0h
TRK1 is disabled
1h
TRK1 is enabled
3
TRK1_S
Real-time information
Real time status of VCORE regulator
0h
VCORE is disabled
1h
VCORE is enabled
2
CORE_S
Real-time information
Real time status of LDO2 regulator
0h
LDO2 is disabled
1h
LDO2 is enabled
1
LDO2_S
Real-time information
Real time Status of LDO1 regulator
0h
LDO1 is disabled
1h
LDO1 is enabled
0
LDO1_S
Real-time information
Table 21. M_STATUS register bit description...continued
16.2.4 M_TSD_FLG
Bit
15
14
13
12
11
10
9
8
Write
TWARN_I
0
0
0
0
0
0
0
Read
TWARN_I
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
Reset
0
0
0
0
0
0
0
0
Table 22. M_TSD_FLG register bit allocation
Bit
7
6
5
4
3
2
1
0
Write
0
GPIO1TSD_I
VPRETSD_I
TRK2TSD_I
TRK1TSD_I
CORETSD_I
LDO2TSD_I
LDO1TSD_I
Read
RESERVED
GPIO1TSD_I
VPRETSD_I
TRK2TSD_I
TRK1TSD_I
CORETSD_I
LDO2TSD_I
LDO1TSD_I
Reset
0
0
0
0
0
0
0
0
Go to main register map
FS26_SDS
All information provided in this document is subject to legal disclaimers.
© 2025 NXP B.V. All rights reserved.
Product short data sheet
Rev. 6.0 — 12 December 2025
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